Patents by Inventor Sean Tyler

Sean Tyler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11938361
    Abstract: Antifreezes are provided for deployment in wet sprinkler systems located in cold environments. The antifreezes allow for the wet sprinkler system to be actuated under temperatures below 32° F. Wet sprinklers, sprinkler systems, methods of providing for the control, suppression and/or extinguishment of a fire that occur in a cold environment, and methods of preventing wet sprinklers from freezing also are provided. The sprinklers, sprinkler systems and methods can be used in residential, commercial and storage settings.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: March 26, 2024
    Assignee: Tyco Fire Products LP
    Inventors: Hayden Erik Hernandez, Jeremy Tyler Cogswell, Sean E. Cutting, Jacob Gelinas
  • Publication number: 20230188516
    Abstract: Systems and methods are described for a multi-tenant mode of a serverless code execution system. For instance, a method may include maintaining a set of execution environments, wherein each execution environment is associated with a serverless function, wherein the serverless function is associated with a software as a service (SaaS) provider that is a tenant of a cloud services provider, wherein the SaaS provider provides services to sub-tenants, wherein the set of execution environments are partitioned based on sub-tenants of the SaaS provider; receiving a call to execute a serverless function, wherein the call includes a serverless function identifier and a sub-tenant identifier; identifying a sub-tenant-specific execution environment of the set of execution environments that is associated with the sub-tenant; and in response to identifying the tenant-specific execution environment, invoking the serverless function on the sub-tenant-specific execution environment.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Inventors: Mikhail Danilov, Deepthi Chelupati, David Nasi, Dylan Owen Marriner, Suganya Rajendran, Sean Tyler Myers
  • Patent number: 11119826
    Abstract: Systems and methods are described for reducing cold starts code within a serverless code execution system by providing a set of environments reserved for the code. A frontend distribute calls for execution among a set of manager devices that manage environments in the system, distributed in a manner that groups calls together and attempts to distribute calls of the same group to a stable subset of the manager devices. In the case that a user reduces or eliminates the number of environments reserved for the code, a frontend continues to distribute calls for execution of the code to those environments while they continue to be used. This reduces cold starts that might otherwise occur during reduction or elimination of reserved environments.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: September 14, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: David Yanacek, Sean Tyler Myers, Yogesh Aggarwal, Naveen Dasa Subramanyam, Amit Raghunath Kulkarni, Aritra Bandyopadhyay, Jianwei Cui
  • Publication number: 20210157645
    Abstract: Systems and methods are described for reducing cold starts code within a serverless code execution system by providing a set of environments reserved for the code. A frontend distribute calls for execution among a set of manager devices that manage environments in the system, distributed in a manner that groups calls together and attempts to distribute calls of the same group to a stable subset of the manager devices. In the case that a user reduces or eliminates the number of environments reserved for the code, a frontend continues to distribute calls for execution of the code to those environments while they continue to be used. This reduces cold starts that might otherwise occur during reduction or elimination of reserved environments.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Inventors: David Yanacek, Sean Tyler Myers, Yogesh Aggarwal, Naveen Dasa Subramanyam, Amit Raghunath Kulkarni, Aritra Bandyopadhyay, Jianwei Cui
  • Patent number: 10942795
    Abstract: Systems and methods are described for reducing cold starts code within a serverless code execution system by providing a set of environments reserved for the code. A frontend utilizes a consistent hash ring to distribute calls for execution among a set of manager devices that manage environments in the system, distributed in a manner that groups calls together and attempts to distribute calls of the same group to a stable subset of the manager devices. Each group is assigned an arc, representing a subset of manager devices. When a call is received to execute a set of code that has environments reserved, the frontend distributes the call to a manager device of a reserved arc. When a call is received to execute a set of code that does not have environment reserved, the frontend distributes the call to an arc associated with an arc for unreserved executions.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: March 9, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: David Yanacek, Sean Tyler Myers, Yogesh Aggarwal, Naveen Dasa Subramanyam, Amit Raghunath Kulkarni, Aritra Bandyopadhyay, Jianwei Cui
  • Publication number: 20180292573
    Abstract: A method is disclosed that includes receiving, at a computer-based tropical cyclone ensemble forecasting system (TCEFS), a plurality of storm forecasts from different storm forecasting agencies, receiving, at the TCEFS, storm-related metadata, pairing the storm-related metadata to the plurality of storm forecasts, adjusting the storm forecasts based on the paired storm-related metadata and other forecast data, producing an ideal blended storm forecast based on the corrected storm forecasts, and enabling a user to view and/or access information about at least the ideal blended storm forecast at a user interface.
    Type: Application
    Filed: August 2, 2017
    Publication date: October 11, 2018
    Inventors: Stefan Francis Cecelski, Leigh Ann Munchak, Sean Tyler Daigneault
  • Publication number: 20070292829
    Abstract: A system for simulating one or more blood vessels to provide more dynamic and realistic intravenous (IV) training and testing in order to educate medical personnel and other critical care givers, such as first responders, medics, and emergency medical technicians (EMTs) in properly administering IVs. The system includes a fluid source and at least one conduit wherein the system supplies fluid or fake blood to the at least one conduit in order to simulate a blood vessel. The system may further include a plurality of blood vessels that have their respective fluid flows controlled by the fluid flow controller.
    Type: Application
    Filed: June 7, 2007
    Publication date: December 20, 2007
    Inventors: Lynn King, Sean Tyler
  • Patent number: 7155692
    Abstract: A method and apparatus for analyzing a circuit are described herein. The circuit may comprise at least two nodes, wherein each of the nodes has timing requirements associated therewith. An embodiment of the method comprises receiving a failure time of first node, wherein the failure time represents the time within which a signal must arrive at the first node from the second node in order to avoid a timing violation of the circuit. The second node is upstream of the first node. A potential slack is determined for the first node based on the failure time of the first node, wherein the potential slack is equal to the failure time minus the sum of the target time and the delay between the first node and the second node. The analysis is terminated if the potential slack is less than a first predetermined value.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: December 26, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sean Tyler, Thomas A. Asprey
  • Publication number: 20060048085
    Abstract: A method and apparatus for analyzing a circuit are described herein. The circuit may comprise at least two nodes, wherein each of the nodes has timing requirements associated therewith. An embodiment of the method comprises receiving a failure time of first node, wherein the failure time represents the time within which a signal must arrive at the first node from the second node in order to avoid a timing violation of the circuit. The second node is upstream of the first node. A potential slack is determined for the first node based on the failure time of the first node, wherein the potential slack is equal to the failure time minus the sum of the target time and the delay between the first node and the second node. The analysis is terminated if the potential slack is less than a first predetermined value.
    Type: Application
    Filed: September 1, 2004
    Publication date: March 2, 2006
    Inventors: Sean Tyler, Thomas A. Asprey
  • Patent number: 6996515
    Abstract: A method and a corresponding apparatus for verifying a minimal level sensitive timing abstraction model provides for an extension of the timing abstraction model. The method modifies and runs the timing abstraction model with certain stimulus to establish whether the timing results with the timing abstraction model are identical to the timing result with the modeled circuit. The timing abstraction model extension, which enables verification of the timing abstraction model, only negligibly increases the size of the timing abstraction model, thus keeping STA runtimes short and the memory requirements small.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: February 7, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Martin Foltin, Brian Foutz, Sean Tyler
  • Publication number: 20050097486
    Abstract: Systems and methods can be employed to determine one or more timing characteristics of a circuit design. In one embodiment, a system includes a calculator that provides an indication of slack for at least one node of a circuit design, the at least one node being capable of operating transparently and non-transparently. The indication of slack is determined based on a minimum of slack for paths that include the at least one node, regardless of path transparency.
    Type: Application
    Filed: November 3, 2003
    Publication date: May 5, 2005
    Inventors: Sean Tyler, Thomas Asprey
  • Patent number: 6611948
    Abstract: A method and a corresponding apparatus provides for modeling circuit environmental sensitivity for a basic minimal level sensitive timing abstraction model. Environmental issues typically include different external conditions, such as input signal switching time and output capacitive loading for the circuit, that are influenced by the circuitry surrounding the basic timing abstraction model. The method for modeling circuit environmental sensitivity involves creation of delay components that allow for modeling the circuit environmental sensitivities while maintaining the transparent regions of the circuit. To properly model the environment effects, zero delay elements may be inserted at input and output ports of the basic timing abstraction model, producing an improved abstraction model that retains accuracy and efficiency of the basic timing abstraction model.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: August 26, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sean Tyler, Martin Foltin, Brian Foutz
  • Patent number: 6609233
    Abstract: A method for improved load sensitivity modeling in a minimal level sensitive timing abstraction model provides for an extension of the timing abstraction model. The timing abstraction model extension improves accuracy of the timing abstraction model by splitting setup/hold check nodes and/or dummy latch nodes at certain input and/or output ports.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: August 19, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Martin Foltin, Brian Foutz, Sean Tyler
  • Patent number: 6604227
    Abstract: A minimal level sensitive timing abstraction model supports multiple levels of hierarchy, is input stimulus independent, can be input into general static timing analysis (STA) tools, and limits timing analysis to the most critical paths, i.e., the most critical arrival at any given port, leading to significant reduction of the number of internal clock-controlled nodes, which in turn results in significant speed-up of STA runs on large circuits and reduced memory and storage space requirements. Further speed-up of STA runs may be achieved by tracing only the most relevant transparent paths to a given output port, which reduces the number of paths fed to the adjacent blocks. The timing abstraction model may also simplify the output from the timing analysis and may shorten designer's time to analyze STA results.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: August 5, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Martin Foltin, Brian Foutz, Sean Tyler
  • Patent number: 6581197
    Abstract: A minimal level sensitive timing representative of a circuit path uses a circuit path timing model to represent a circuit block, which contains multiple circuit paths, in a simplified form, thus reducing the circuit paths to a minimized representation with same timing requirements and fixed clock waveforms. The reduction of the circuit paths in turn results in significant speed-up of static timing analysis (STA) runs on large circuits and reduced memory and storage space requirements. The minimal level sensitive timing representative may simplifies the output from the timing analysis and shortens designer's time to analyze STA results.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: June 17, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brian Foutz, Martin Foltin, Sean Tyler
  • Patent number: 5740407
    Abstract: A method of generating power vectors to calculate power dissipation for a circuit is provided. The circuit includes both combinational logic and sequential logic circuits. The method includes removing all sequential logic circuits from the circuit. Boolean equations that describe the logical operation of the combinational logic of the circuit cells are generated. Power vectors are generated from the Boolean equations corresponding to internal and output transitions which dissipate power in the circuit. Redundant power vectors are then eliminated. The power vectors are then analyzed for "consistent" behavior with the sequential logic circuits. Operation of sequential logic circuits follow an ordered or defined sequence of events. Power vectors that are "inconsistent" with the operation of the sequential logic circuits are eliminated. The remaining power vectors are used to simulate the power dissipation of the circuit.
    Type: Grant
    Filed: July 5, 1995
    Date of Patent: April 14, 1998
    Assignee: Motorola, Inc.
    Inventors: Gary Yeap, Alberto Reyes, Sean Tyler
  • Patent number: 5373457
    Abstract: A method for deriving a piecewise-linear model which comprises measuring the behavior of a desired characteristic of an object. Recording the observations in a computer memory. Creating a piece-wise linear model of the observations based on the highest and lowest valued observations. Computing an error value for the dependent variable of each observation based on the piece-wise linear model. Determining a new piece-wise linear model based on two segments by interpolation. Recursively repeating the steps of computing error values and determining an improved piece-wise linear model until a predetermined acceptance condition is achieved. Performing a computer simulation of the desired characteristic of the object using the improved piecewise-linear model.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: December 13, 1994
    Assignee: Motorola, Inc.
    Inventors: Binay J. George, Markus Wloka, Sean Tyler