Patents by Inventor Sebastien GAREAU

Sebastien GAREAU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974079
    Abstract: A ZR or ZR+ interface includes circuitry configured to receive one or more client signals; and circuitry configured to transmit the one or more client signals as an aggregate signal in a Flexible Ethernet (FlexE) format in one of a ZR format and a ZR+ format, including a mapping indicative of how the one or more client signals are one of multiplexed and subrated into the aggregate signal. The aggregate signal can have a rate that does not correspond to a standard Ethernet Physical Medium Dependent (PMD). The FlexE format can include a plurality of FlexE instances with at least one of the FlexE instances having calendar slots removed for a subrating application.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: April 30, 2024
    Assignee: Ciena Corporation
    Inventor: Sebastien Gareau
  • Patent number: 11916661
    Abstract: Systems and methods for timing over a Metro Transport Networking (MTN) path include detecting a specific block in a stream of blocks, wherein each block is encoded based on a line code, and sampling an output of a clock to determine a timestamp reference based on detection of the specific block, and transmitting timing information based on the timestamp reference. The specific block can be a control block. The timing information can be transmitted via a Precision Time Protocol (PTP) message. The timing information can be transmitted via a plurality of subsequent specific blocks.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: February 27, 2024
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Andrew McCarthy
  • Publication number: 20240048235
    Abstract: Systems and methods include receiving (102) a plurality of symbols that are part of a defined Digital Signal Processing (DSP) frame for coherent optical communication, wherein the DSP frame structure has a messaging channel incorporated therein that includes a subset of the plurality of symbols; capturing (104) multiple samples of the messaging channel; and determining (106) a message in the messaging channel based on analysis of the multiple samples. The method can further include transmitting (108), in the messaging channel, a reply to the message with the reply being repeated multiple times. The analysis is performed prior to Forward Error Correction (FEC) decoding on the data path.
    Type: Application
    Filed: December 9, 2021
    Publication date: February 8, 2024
    Inventors: Sebastien Gareau, Timothy James Creasy
  • Publication number: 20240048234
    Abstract: An optical interface includes circuitry configured to operate the optical interface at a first rate, subsequent to a requirement to subrate the optical interface to a second rate, determine which services are affected, signal a partial failure for the one or more affected services, and operate the optical interface at a second rate that is less than the first rate. The optical interface can be a Flexible Optical (FlexO) or ZR interface.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 8, 2024
    Applicant: Ciena Corporation
    Inventor: Sebastien Gareau
  • Publication number: 20240007225
    Abstract: Systems and methods include receiving (51) blocks of data that has been Forward Error Correction (FEC) encoded via Open Forward Error Correction (OFEC) adaptation; decoding (52) the blocks of data; processing (53) checksum data that is included in padding data required in the OFEC adaptation, wherein the padding data is distributed across N rows of payload data; and determining (54) a location of any errors in the payload data based on the processed checksum data. The OFEC adaptation is for mapping the blocks of data into any of a FlexO structure, a ZR structure, and variants thereof, and the location of any errors can be used for error marking.
    Type: Application
    Filed: November 2, 2021
    Publication date: January 4, 2024
    Inventors: Sebastien Gareau, Jeffery Thomas Nichols
  • Patent number: 11843414
    Abstract: An optical interface includes circuitry configured to operate the optical interface at a first rate, subsequent to a requirement to suberate the optical interface to a second rate, determine which services are affected, signal a partial failure for the one or more affected services, and operate the optical interface at a second rate that is less than the first rate. The optical interface can be a Flexible Optical (FlexO) or ZR interface.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: December 12, 2023
    Assignee: Ciena Corporation
    Inventor: Sebastien Gareau
  • Patent number: 11695494
    Abstract: An asynchronous adaptation process includes receiving a first plurality of frames of a first interface group at a first rate, determining idle/stuffing data to be added in each of the first plurality of frames based on a second rate associated with a second plurality of frames of a second interface group, adding information about the idle/stuffing data in each frame of the first plurality of frames in a preceding frame, and transmitting the second plurality of frames of the second interface group with the idle/stuffing data included therein, wherein the second plurality of frames includes the first plurality of frames with the idle/stuffing data.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: July 4, 2023
    Assignee: Ciena Corporation
    Inventors: Andrew McCarthy, Sebastien Gareau
  • Patent number: 11695472
    Abstract: Systems and methods include determining which services in a single Optical Transport Unit Cn (OTUCn) that is transmitted in an optical network via a plurality of optical carriers are affected by failed one or more optical carriers of the plurality of optical carriers; continuing to operate the single OTUCn with unaffected one or more optical carriers of the plurality of optical carriers; and adjusting some or all of the services from the failed one or more optical carriers to the unaffected one or more optical carriers.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: July 4, 2023
    Assignee: Ciena Corporation
    Inventors: Trevor John Ibach, Rahim Amarsi, Sebastien Gareau
  • Patent number: 11658737
    Abstract: Systems and methods include receiving a plurality of symbols that are part of a defined Digital Signal Processing (DSP) frame for coherent optical communication, wherein the DSP frame structure has a messaging channel incorporated therein that includes a subset of the plurality of symbols; capturing multiple samples of the messaging channel; and determining a message in the messaging channel based on analysis of the multiple samples. The method can further include transmitting, in the messaging channel, a reply to the message with the reply being repeated multiple times. The analysis is performed prior to Forward Error Correction (FEC) decoding on the data path.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 23, 2023
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Timothy James Creasy
  • Patent number: 11646864
    Abstract: An optical module for use in an optical system is disclosed, the optical module implementing Precision Time Protocol (PTP) clock functionality therein. The optical module includes an electrical interface with the optical system; circuitry connected to the electrical interface and configured to implement a plurality of functions of functionality; an optical interface connected to the circuitry; and timing circuitry connected to the electrical interface and one or more of the plurality of functions, wherein the timing circuitry is configured to implement the PTP clock functionality.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: May 9, 2023
    Assignee: Ciena Corporation
    Inventors: Daniel Claude Perras, Sebastien Gareau
  • Publication number: 20230031796
    Abstract: Systems and methods include receiving a plurality of symbols that are part of a defined Digital Signal Processing (DSP) frame for coherent optical communication, wherein the DSP frame structure has a messaging channel incorporated therein that includes a subset of the plurality of symbols; capturing multiple samples of the messaging channel; and determining a message in the messaging channel based on analysis of the multiple samples. The method can further include transmitting, in the messaging channel, a reply to the message with the reply being repeated multiple times. The analysis is performed prior to Forward Error Correction (FEC) decoding on the data path.
    Type: Application
    Filed: July 23, 2021
    Publication date: February 2, 2023
    Inventors: Sebastien Gareau, Timothy James Creasy
  • Patent number: 11552722
    Abstract: A coherent optical modem includes an optical interface; and circuitry connected to the optical interface and configured to detect a first timing reference point in a transmit Digital Signal Processor (DSP) frame in a transmit direction from a first node to a second node, and detect a second timing reference point in a receive DSP frame in a receive direction from the second node to the first node, wherein the first timing reference point and the second timing reference point are determined based on a pattern in any DSP frame field including i) padding area, ii) a reserved area, and iii) a DSP Multi-Frame Alignment Signal (MFAS) area. The pattern can be input in select DSP frames for a time period that is greater than a time period for each DSP frame.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 10, 2023
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Jeffery Thomas Nichols, Manoj Verghese, Andrew McCarthy
  • Publication number: 20230006759
    Abstract: An asynchronous adaptation process includes receiving a first plurality of frames of a first interface group at a first rate, determining idle/stuffing data to be added in each of the first plurality of frames based on a second rate associated with a second plurality of frames of a second interface group, adding information about the idle/stuffing data in each frame of the first plurality of frames in a preceding frame, and transmitting the second plurality of frames of the second interface group with the idle/stuffing data included therein, wherein the second plurality of frames includes the first plurality of frames with the idle/stuffing data.
    Type: Application
    Filed: June 29, 2021
    Publication date: January 5, 2023
    Inventors: Andrew McCarthy, Sebastien Gareau
  • Publication number: 20220264204
    Abstract: A ZR or ZR+ interface includes circuitry configured to receive one or more client signals; and circuitry configured to transmit the one or more client signals as an aggregate signal in a Flexible Ethernet (FlexE) format in one of a ZR format and a ZR+ format, including a mapping indicative of how the one or more client signals are one of multiplexed and subrated into the aggregate signal. The aggregate signal can have a rate that does not correspond to a standard Ethernet Physical Medium Dependent (PMD). The FlexE format can include a plurality of FlexE instances with at least one of the FlexE instances having calendar slots removed for a subrating application.
    Type: Application
    Filed: July 20, 2020
    Publication date: August 18, 2022
    Inventor: Sebastien Gareau
  • Publication number: 20220190946
    Abstract: A coherent optical modem includes an optical interface; and circuitry connected to the optical interface and configured to detect a first timing reference point in a transmit Digital Signal Processor (DSP) frame in a transmit direction from a first node to a second node, and detect a second timing reference point in a receive DSP frame in a receive direction from the second node to the first node, wherein the first timing reference point and the second timing reference point are determined based on a pattern in any DSP frame field including i) padding area, ii) a reserved area, and iii) a DSP Multi-Frame Alignment Signal (MFAS) area. The pattern can be input in select DSP frames for a time period that is greater than a time period for each DSP frame.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 16, 2022
    Inventors: Sebastien Gareau, Jeffery Thomas Nichols, Manoj Verghese, Andrew McCarthy
  • Patent number: 11316802
    Abstract: Time transfer systems and methods implemented in a first node steps of communicating a stream of encoded blocks with a second node; and communicating synchronization messages with the second node via a synchronization message channel in overhead associated with the stream of encoded blocks, wherein the synchronization messages are utilized for synchronization of a clock at the second node. Each block in the stream of encoded blocks can be one of a data block and an overhead block.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: April 26, 2022
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Marc Leclair
  • Patent number: 11277217
    Abstract: A switch system includes interface circuitry configured to ingress and egress clients each including a stream of encoded blocks; and switch circuitry configured to switch the clients between the interface circuitry based on block boundaries of the stream of encoded blocks. The stream of encoded blocks can include 64 b/66 b encoding. Each block in the stream of encoded blocks can be switched intact.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: March 15, 2022
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, James Tierney, David Stuart
  • Patent number: 11184112
    Abstract: Systems and methods include receiving blocks of data that has been Forward Error Correction (FEC) encoded via Open Forward Error Correction (OFEC) adaptation; decoding the blocks of data; processing Cyclic Redundancy Check (CRC) data that is included in padding data required in the OFEC adaptation, wherein the padding data is distributed across N rows of payload data; and determining a location of any errors in the payload data based on the processed CRC data. The OFEC adaptation is for mapping the blocks of data into any of a FlexO-x frame structure, a ZR frame structure, and variants thereof, and the location of any errors can be used for error marking.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: November 23, 2021
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Jeffery Thomas Nichols
  • Patent number: 11082367
    Abstract: A circuit includes a buffer configured to receive a first Flexible Ethernet (FlexE) frame having 66b blocks including 66b overhead blocks and 66b data blocks, wherein the buffer is configured to accumulate the 66b overhead blocks and the 66b data blocks; a mapping circuit configured to map four x 66b overhead blocks from the buffer into a 257b overhead block and to map a sequence of four x 66b data blocks from the buffer into a 257b data block; and a transmit circuit configured to transmit a second FlexE frame having 257b blocks from the mapping circuit. The mapping circuit can be configured to accumulate four 66b blocks of a same kind from the buffer for mapping into a 257b block, where the same kind is one of overhead and a particular calendar slot n where n=0-19.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: August 3, 2021
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, Eric S. Maniloff
  • Publication number: 20210194576
    Abstract: An optical interface includes circuitry configured to operate the optical interface at a first rate, subsequent to a requirement to suberate the optical interface to a second rate, determine which services are affected, signal a partial failure for the one or more affected services, and operate the optical interface at a second rate that is less than the first rate. The optical interface can be a Flexible Optical (FlexO) or ZR interface.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventor: Sebastien Gareau