Abstract: An integrated circuit including an electronic fuse for supporting a secure bootstrap process, in which the fuse is queried. The circuit includes a protection against electromagnetic fault injection. The circuit is configured in such a way that the protection extends to the bootstrap process.

Abstract: The present disclosure provides for a railing assembly further comprised of a top and bottom rail separated by balusters. The balusters are connected to one another by means of spacers, which are in turn connected to both the top and bottom rails by means of a snap-fit connection. A method of assembly of the rail assembly is also disclosed, comprised of snap-fitting the spacers to the top and bottom rails and installing the balusters in between pairs of adjacent spacers, and repeating this process for a given length of the top and bottom rails.

Abstract: A computer-implemented method for processing data of a technical system having multiple data processing areas, which is designed for processing input data, in particular of a computing device for carrying out cryptographic methods, based on the input data. The computer-implemented method including a) modeling at least one part of the technical system with the aid of at least one, in particular artificial, neural network; b) ascertaining at least two physical variables of the technical system for at least two of the multiple data processing areas, in particular during a processing of at least one part of the input data, the at least two physical variables each being assigned to one different data processing area, the at least two physical variables being at least temporarily assigned to the neural network as input variables.

Abstract: An integrated circuit including an electronic fuse for supporting a secure bootstrap process, in which the fuse is queried. The circuit includes a protection against electromagnetic fault injection. The circuit is configured in such a way that the protection extends to the bootstrap process.

Abstract: The present disclosure provides for a railing assembly further comprised of a top and bottom rail separated by balusters. The balusters are connected to one another by means of spacers, which are in turn connected to both the top and bottom rails by means of a snap-fit connection. A method of assembly of the rail assembly is also disclosed, comprised of snap-fitting the spacers to the top and bottom rails and installing the balusters in between pairs of adjacent spacers, and repeating this process for a given length of the top and bottom rails.

Abstract: A method for processing data includes coding a data item to obtain a coded data item that includes a predefinable number of bits, influencing maximally k many bits of the coded data item to obtain a changed data item, decoding the changed data item by using a fault-correcting code to obtain a decoded data item, and processing the decoded data item.

Abstract: A method for providing a computer program for a computing unit of an electronic device, in particular a control device of a motor vehicle or of a household appliance, wherein the method includes: evaluation of properties of the electronic device relating to a susceptibility to side channel attacks and/or fault attacks, as a result of which an evaluation result is obtained, selection of at least one influencing parameter that has an influence on the susceptibility of the electronic device to side channel attacks and/or fault attacks, in particular as a function of the evaluation result, use of the at least one influencing parameter to diversify the computer program for the computing unit.

Abstract: A method for protecting a network against a cyberattack, in which for a message in the network first characteristics of a first transmission of the message are determined and an origin of the message in the network is determined by a comparison of the first characteristics with at least one fingerprint of at least one subscriber or a segment of the network or a transmission route. If a manipulation of the message is detected, a point of attack of the cyberattack in the network is detected and localized in particular on the basis of the origin of the message.

Abstract: A device for carrying out a computing process, in particular a cryptographic process, the device having a primary functional unit that is fashioned to carry out at least a part of the computing process, wherein the device has at least one secondary functional unit that is fashioned to influence, in a specifiable time range, one or more physical parameters of the device.

Abstract: A method for safeguarding a system-on-a-chip includes a hardware-programmable logic unit. In the course of a programming process, a public PUF key and a private PUF key are generated in the hardware-programmable logic unit with the aid of a physical unclonable function, and the public PUF key is signed with the aid of a second private key. The public PUF key and its signature are stored in an external memory of the system-on-a-chip, a security module is signed with the aid of a third private key, the security module and its signature are stored in the external memory of the system-on-a-chip, and the security module includes software which is used for safeguarding the system-on-a-chip.

Abstract: A symmetrical iterated block encryption method includes: a bitwise XOR combination of a predetermined data word of a predetermined block with a predetermined data word of a predetermined round key; and a bitwise XOR combination of the predetermined data word with at least one other predetermined data word.

Abstract: A method for providing a computer program for a computing unit of an electronic device, in particular a control device of a motor vehicle or of a household appliance, wherein the method includes: evaluation of properties of the electronic device relating to a susceptibility to side channel attacks and/or fault attacks, as a result of which an evaluation result is obtained, selection of at least one influencing parameter that has an influence on the susceptibility of the electronic device to side channel attacks and/or fault attacks, in particular as a function of the evaluation result, use of the at least one influencing parameter to diversify the computer program for the computing unit.

Abstract: A method for processing data includes coding a data item to obtain a coded data item that includes a predefinable number of bits, influencing maximally k many bits of the coded data item to obtain a changed data item, decoding the changed data item by using a fault-correcting code to obtain a decoded data item, and processing the decoded data item.

Abstract: A method for safeguarding a system-on-a-chip includes a hardware-programmable logic unit. In the course of a programming process, a public PUF key and a private PUF key are generated in the hardware-programmable logic unit with the aid of a physical unclonable function, and the public PUF key is signed with the aid of a second private key. The public PUF key and its signature are stored in an external memory of the system-on-a-chip, a security module is signed with the aid of a third private key, the security module and its signature are stored in the external memory of the system-on-a-chip, and the security module includes software which is used for safeguarding the system-on-a-chip.

Abstract: In a method for the supply of encoded configuration data (14) to a programmable, integrated logic circuit (4), un-encoded configuration data (12) comprising an algorithm (20) are initially supplied to the logic circuit (4). The encoded configuration data (14) are loaded into the logic circuit (4) and, by means of the algorithm (20) and a key (34), which is supplied to the logic circuit (4) logic-circuit-externally and separately from the encoded configuration data (14) and from the un-encoded configuration data (12), decoded for the activation of the algorithm (20) and stored logic-circuit-internally. Moreover, a device (2) for the implementation of the method and method for generating the configuration data (12, 14) provided for the programmable, integrated logic circuit (4) are specified.