Abstract: A semiconductor device includes: an integrated circuit layer including a transistor; a first interconnection layer on a front side of the integrated circuit layer; a second interconnection layer on a back side of the integrated circuit layer; and a connection terminal on the second interconnection layer, wherein the second interconnection layer includes: an insulating layer; an interconnection structure in the insulating layer; an active contact disposed between the interconnection structure and a source/drain region of the transistor and connected to the source/drain region; and a dummy metal structure spaced apart from the interconnection structure in a first direction, and wherein the dummy metal structure does not overlap the connection terminal in a second direction that is perpendicular to the first direction.

Abstract: Methods of fabricating a semiconductor device are provided. The methods may include forming a lower mold layer on a substrate that includes first and second regions, forming first and second intermediate mold patterns on the first and second regions, respectively, forming first spacers on sidewalls of the first and second intermediate mold patterns, etching the lower mold layer to form first and second lower mold patterns on the first and second regions, respectively, and etching the substrate to form active patterns and dummy patterns on the first and second regions, respectively. A first distance between a pair of the first intermediate mold patterns may be greater than a second distance between a pair of the second intermediate mold patterns, and the second lower mold patterns may include at least one first merged pattern, whose width is substantially equal to the second distance.

Abstract: Methods of fabricating a semiconductor device are provided. The methods may include forming a lower mold layer on a substrate that includes first and second regions, forming first and second intermediate mold patterns on the first and second regions, respectively, forming first spacers on sidewalls of the first and second intermediate mold patterns, etching the lower mold layer to form first and second lower mold patterns on the first and second regions, respectively, and etching the substrate to form active patterns and dummy patterns on the first and second regions, respectively. A first distance between a pair of the first intermediate mold patterns may be greater than a second distance between a pair of the second intermediate mold patterns, and the second lower mold patterns may include at least one first merged pattern, whose width is substantially equal to the second distance.