Abstract: An integrated circuit can include frequency monitoring circuitry. The frequency monitoring circuitry may include a voltage based frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a first set of frequencies and a coarse frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a second set of frequencies different than the first set of frequencies. The voltage based frequency monitoring circuit can be configured to generate an output voltage having a first value when the input clock frequency is greater than a reference frequency and having a second value when the input clock frequency is less than the reference frequency. The coarse frequency monitoring circuit can include a reference counter and an input clock counter that generates a count value used to compute the input clock frequency.

Abstract: The present disclosure describes embodiments of a compact low voltage CMOS-based temperature sensor. The CMOS-based temperature sensor can include a reference voltage generator, a temperature front-end circuit, and an analog-to-digital converter (ADC). The reference voltage generator can be configured to generate a reference voltage independent of temperature. The temperature front-end circuit can include first and second transistors configured to generate a temperature signal proportional to temperature. The first MOS transistor can include first and second terminals. The first terminal can be electrically coupled to the reference voltage. The second terminal can be electrically coupled to the second MOS transistor. The second terminal can provide the temperature signal. The ADC can be electrically coupled to the reference voltage and configured to convert the temperature signal to a digital signal.

Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.

Abstract: A reference generator circuit included in a computer system may employ multiple field-effect transistors to generate a reference voltage whose value is based on the threshold voltages of the multiple field-effect transistors. The reference generator circuit can include a current source that generates a bias current. One of more stages included in the reference generator circuit can generate, using the bias current, respective output voltages whose values are based on differences in threshold voltages of field-effect transistors included in the stages. The output voltages can be combined to generate different reference voltage values.

Abstract: A sensor system included in an integrated circuit includes multiple sensor circuits and a control circuit. Using characterization data, a model may be generated that defines a relationship between measurable parameters of the integrated circuit and an operating characteristic of the integrated circuit. The control circuit can combine, using a function included in the model, data from the multiple sensor circuits to determine a value of the operating characteristic that is more accurate than a sensor circuit configured to measure a single parameter of the integrated circuit that varies with the operating characteristic.

Abstract: A power supply circuit included in a computer system regulates a power supply voltage using an input power supply. During startup, the power supply circuit uses a first reference voltage that is generated using the input power supply to regulated the power supply voltage. After a period of time has elapsed, the power supply circuit switches to using a more accurate second reference voltage that is generated using the regulated power supply voltage.

Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.

Abstract: A comparator circuit included in a computer system employs an inverter circuit as a high-speed comparison circuit. To allow the inverter circuit to compare an input signal to a particular threshold value, a trip point of the inverter circuit is adjusted to match the threshold value by modifying a voltage level of a power supply node coupled to the inverter. To modify the voltage level of the power supply node, a replica of the inverter circuit is biased to generate a bias signal that corresponds to the trip point of the inverter circuit. A comparator circuit compares the bias signal to the threshold value, and adjusts the voltage level of the power supply node using results of the comparison. An output circuit adjusts an output of the inverter circuit to generate a full-rail output signal.

Abstract: A power supply circuit included in a computer system is configured to generate a particular voltage level on a regulated power supply node using multiple charge pump circuits coupled together via a regulation device to provide regulation. A first charge pump circuit is configured to, using a voltage of an input power supply node, generate an intermediate voltage level, which is regulated by the regulation device. The second charge pump is configured to generate a voltage level on the regulated power supply node using a regulated version of intermediate voltage level. An impedance of the regulation device is adjusted using results of comparing the voltage level of the regulated power supply node to a reference voltage.

Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.

Abstract: An image sensing system and methods for operating the same are disclosed. An image sensing system includes a plurality of pixel circuits, a multiplexer configured to select one of the pixel circuit and provide analog pixel data without sampling, and a successive approximation register (SAR) analog-to-digital converter (ADC) configured to convert the analog pixel data into digital data. The SAR ADC includes a capacitive digital-to-analog converter (CDAC) configured to convert contents of the SAR into a corresponding analog signal for comparison, by a comparator, with the analog pixel data. The CDAC includes a two-dimensional array of circuit elements. A control circuit in the image sensing system is configured to cause random ones of the circuit elements of the CDAC to be selected for generation of the corresponding analog signal and add a dithering signal so a CDAC output and shuffle a multiplexer switch sequence to improve fixed pattern noise.

Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.

Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.

Abstract: An image sensing system and methods for operating the same are disclosed. An image sensing system includes a plurality of pixel circuits, a multiplexer configured to select one of the pixel circuit and provide analog pixel data without sampling, and a successive approximation register (SAR) analog-to-digital converter (ADC) configured to convert the analog pixel data into digital data. The SAR ADC includes a capacitive digital-to-analog converter (CDAC) configured to convert contents of the SAR into a corresponding analog signal for comparison, by a comparator, with the analog pixel data. The CDAC includes a two-dimensional array of circuit elements. A control circuit in the image sensing system is configured to cause random ones of the circuit elements of the CDAC to be selected for generation of the corresponding analog signal and add a dithering signal so a CDAC output and shuffle a multiplexer switch sequence to improve fixed pattern noise.