Abstract: A circuit useful as an edge detector or pulse width encoder which receives an input signal and supplies a logic output signal includes a delay and inverting circuit for logically inverting and delaying input signals so as to supply a delayed and inverted signal or pulse. The circuit also includes a gate having a first input for receiving the input signal and a second input for receiving the delayed and inverted pulse. The gate provides a logic output signal whenever the input pulse signal and the delayed and inverted output pulse are at different logic levels. The circuit may be expanded with additional circuit elements including a delay circuit for delaying the input signal and an additional gate having an input for receiving the logic output signal and an output connected to the input of the delay circuit. The expanded circuit oscillates at a frequency which varies in response to the delays in the circuit.

Abstract: 1. Apparatus comprisingA pair of signal sensors spacially displaced from each other,Means connected to each sensor for quantizing the signals at the output thereof,First and second two-mode reversing switches, each switch having two inputs respectively connected to two outputs in one mode and having said two inputs inversely connected to said two outputs in the other mode,Each quantized signal being applied to a respective input of said first switch,One output of said first switch being connected to one input of said second switch,Variable delay means connected between the other output of said first switch and the other input of said second switch,Means for controlling the delay of said variable delay means and the modes of said first and second switches,A signal correlator connected to the outputs of said second switch to produce an output signal representing the correlation function of the signals at the outputs of said second switch,And signal integrating means responsive to said output signals.