Patents by Inventor Seetharaman Sridhar

Seetharaman Sridhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated bipolar junction transistor for mixed signal circuits
    Patent number: 6303420
    Abstract: A method for forming integrated circuit bipolar junction transistors for mixed signal circuits. The implants used to form the well regions of the CMOS circuits 20, 40 form the collector regions of bipolar junction transistors. The CMOS transistor pocket implants form the base region of the bipolar junction transistor, and the CMOS drain extension implants form the emitter region of the bipolar junction transistor.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: October 16, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Seetharaman Sridhar, Amitava Chatterjee, Hisashi Shichijo, Alec J. Morton
  • Shallow trench isolation with conductive hard mask for in-line moat/trench width electrical measurements
    Patent number: 6204073
    Abstract: A method for forming STI that allows for in-situ moat/trench width electrical measurement is disclosed herein. A conductive layer (18) is used in the hard mask (20) for trench etch. After the hard mask (20) is formed and the trench (12) is etched, the resistance of the conductive layer (18) is measured over a predefined length. Since the length is known, the average width of the hard mask (20)/moat (11) can be determined. Once the width of the moat (11) is known, the width of the trench (12) can easily be determined by subtracting the width of the moat (12) from the pitch, which is a known factor.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: March 20, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Mahalingam Nandakumar, Seetharaman Sridhar