Abstract: A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.

Abstract: A display device includes an on-duty determiner which determines an on-duty period of an emission signal, based on a number of at least one cycle of a current frame, a first compensation value determiner which determines a first compensation value of a bias voltage according to a variation of the on-duty period, a second compensation value determiner which determines a second compensation value of the bias voltage, based on a driving frequency of a previous frame, and a third compensation value determiner which determines a third compensation value, based on the first compensation value and the second compensation value.

Abstract: The present invention relates to a negative electrode active material including a silicon-based core, a first coating layer positioned on the silicon-based core, and a second coating layer positioned on the first coating layer, wherein the second coating layer includes a metal material doped onto a surface thereof.

Abstract: A pixel includes: a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is applied, and a third node electrically connected to the light emitting element; a first emission control transistor having an on-off timing controlled by a first emission control signal; and a second emission control transistor having an on-off timing controlled by a second emission control signal. A time interval exists between a time at which the first emission control signal having a turn-on level is input such that a voltage of the second node is dropped from a bias voltage having a voltage level higher than a voltage level of the first power voltage and a time at which the second emission control signal having a turn-on level is input.

Abstract: A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.

Abstract: A pixel includes: a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is applied, and a third node electrically connected to the light emitting element; a first emission control transistor having an on-off timing controlled by a first emission control signal; and a second emission control transistor having an on-off timing controlled by a second emission control signal. A time interval exists between a time at which the first emission control signal having a turn-on level is input such that a voltage of the second node is dropped from a bias voltage having a voltage level higher than a voltage level of the first power voltage and a time at which the second emission control signal having a turn-on level is input.

Abstract: A display device including: a display panel including first and second display areas, and including pixels in the first and second display areas; and a data driver to output data signals to the pixels through a channels arranged along a first direction, wherein the channels include a first channel group corresponding to the first display area and a second channel group corresponding to the second display area, wherein some of the pixels emit light in different colors and have a first pixel arrangement along the first direction, and based on channel selection information about the first or second channel groups, the data driver outputs first data signals in a first output order along the first direction corresponding to the first pixel arrangement through the first channel group, and outputs second data signals in a second output order different from the first output order through the second channel group.

Abstract: A pixel includes: a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is applied, and a third node electrically connected to the light emitting element; a first emission control transistor having an on-off timing controlled by a first emission control signal; and a second emission control transistor having an on-off timing controlled by a second emission control signal. A time interval exists between a time at which the first emission control signal having a turn-on level is input such that a voltage of the second node is dropped from a bias voltage having a voltage level higher than a voltage level of the first power voltage and a time at which the second emission control signal having a turn-on level is input.

Abstract: A display device includes: a data driver for supplying a data signal to each of a plurality of data lines; and a pixel unit including a plurality of sub-pixels. The pixel unit further includes one dummy data line disposed separate from a data line of a first column among the data lines. The data line of the first column is connected to sub-pixels disposed on odd-numbered pixel rows among sub-pixels disposed on a first pixel column, and is connected to sub-pixels disposed on even-numbered pixel rows among sub-pixels disposed on a third pixel column. The dummy data line is connected to sub-pixels disposed on the even-numbered pixel rows among the sub-pixels disposed on the first pixel column.

Abstract: A display device includes: a data driver for supplying a data signal to each of a plurality of data lines; and a pixel unit including a plurality of sub-pixels. The pixel unit further includes one dummy data line disposed separate from a data line of a first column among the data lines. The data line of the first column is connected to sub-pixels disposed on odd-numbered pixel rows among sub-pixels disposed on a first pixel column, and is connected to sub-pixels disposed on even-numbered pixel rows among sub-pixels disposed on a third pixel column. The dummy data line is connected to sub-pixels disposed on the even-numbered pixel rows among the sub-pixels disposed on the first pixel column.

Abstract: A display device of the invention includes: a pixel portion including first pixel rows connected to first scan lines and second pixel rows connected to second scan lines; a scan driver including first and second stages connected to the first scan lines and the second scan lines; and a data driver connected to the first and second pixel rows through same data lines. The first stages are connected to first clock lines, the second stages are connected to second clock lines, a first start stage of the first stages and a second start stage of the second stages are connected to a same scan start line, each first stage excluding the first start stage is connected to a first scan line of a previous first stage, and each second stage excluding the second start stage is connected to a second scan line of a previous second stage.

Abstract: A display device includes: a data driver for supplying a data signal to output lines; a demultiplexer connected to each of the output lines, the demultiplexer to supply the data signal supplied to each output line to a first data line and a second data line; first pixels disposed in a (2j?1)-th column and a (2k?1)-th row, the first pixels being connected to the first data line, wherein j and k are positive integers; second pixels disposed in the (2j?1)-th column and a (2k)-th row, the second pixels being connected to the second data line; third pixels disposed in a (2j)-th column and the (2k?1)-th row, the third pixels being connected to the first data line; and fourth pixels disposed in the (2j)-th column and the (2k)-th row, the fourth pixels being connected to the second data line.

Abstract: A display device includes a first switching element including a second electrode and a first gate electrode, a second switching element including a third electrode connected with the first gate electrode, a third switching element including a fifth electrode connected with the second electrode, and sixth electrode, a fourth switching element including a seventh electrode connected with the second electrode, and an eighth electrode, a fifth switching element including a ninth electrode connected with the second electrode, and a tenth electrode, a first light emitting diode connected with the sixth electrode and the eighth electrode, a second light emitting diode connected with the eighth electrode and the sixth electrode, and a switch selectively connecting a common power source line with the sixth electrode or the eighth electrode. The first light emitting diode and the second light emitting diode have different polarities from each other with respect to a same direction.

Abstract: A display device includes: a pixel part to display an image and including pixels receiving a reference voltage; a controller to determine a value of the reference voltage based on a load of the entire pixel part, and to control a grayscale range of image data according to a location in the pixel part based on the reference voltage; a data driver to supply data voltages to the pixel part through data lines based on grayscale ranges adjusted for each location in the pixel part; and a scan driver to supply a scan signal to the pixels through scan lines.

Abstract: A display device including: a display panel including first and second display areas, and including pixels in the first and second display areas; and a data driver to output data signals to the pixels through a channels arranged along a first direction, wherein the channels include a first channel group corresponding to the first display area and a second channel group corresponding to the second display area, wherein some of the pixels emit light in different colors and have a first pixel arrangement along the first direction, and based on channel selection information about the first or second channel groups, the data driver outputs first data signals in a first output order along the first direction corresponding to the first pixel arrangement through the first channel group, and outputs second data signals in a second output order different from the first output order through the second channel group.

Abstract: The present disclosure provides a display device that controls output of a scan signal, conversion of image data, and output of a data signal in response to partial scan driving. The display device includes a display panel driven in one of a first mode and a second mode, a scan driver sequentially supplying a scan signal for writing data in the first mode, a controller generating image data in which input image data is rearranged based on the first mode or the second mode, and a data driver converting the image data into data signals and supplying the data signals to output channels.

Abstract: A display device includes: a display panel configured to display an image; a signal controller configured to determine whether an input image signal is a still image signal, and determine color coordinates using data values of one frame data of the input image signal, and generate compensated image data by compensating image data of the one frame data based on the color coordinates; and a data driver configured to generate a data signal based on the compensated image data and output the compensated image data to the display panel through a data line.

Abstract: A pixel includes a light emitting element, a first transistor including a gate electrode electrically connected to a first node, a second transistor including a gate electrode connected to a first scan line, a third transistor including a gate electrode connected to the first scan line, a fourth transistor including a gate electrode connected to a second scan line, a fifth transistor including a gate electrode electrically connected to a third scan line, an sixth transistor including a gate electrode electrically connected to the third scan line, a resistor electrically connected in parallel with the sixth transistor between the second node and the anode of the light emitting element, and an amplifier having a non-inverting terminal and an inverting terminal electrically connected to ends of the resistor, respectively.

Abstract: A display system includes: a host processor which outputs first image data and outputs scan frequency information and a partial scan enable signal, based on an image driving frequency; a display module controlled by the host processor; and an interface. The display module includes: a display driving circuit which controls a selection of pixel rows to which the data signals are supplied based on the scan frequency information and the partial scan enable signal; and a display panel which displays an image on selected pixel rows based on the data signals. In a video mode of the interface, the host processor divides and outputs the first image data through the interface during transmission periods, based on the image driving frequency, and suspends an output of the first image data through the interface during suspend periods.

Abstract: A display system and a driving method for a display system that includes an application processor configured to supply a mode control signal corresponding to a plurality of driving modes and input image data corresponding thereto; and a display module that includes pixels configured to display an image and configured to control any one of a plurality of gamma values and power source voltages supplied to the pixels in response to the plurality of driving modes.