Patents by Inventor Sei-Ching Yang

Sei-Ching Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140340091
    Abstract: A method for measuring electric charge of a battery is provided. The method includes the following steps. A lookup table is provided that stores a plurality of preset measurement confirmation voltages and a plurality of set electric charge. A first voltage of the battery is measured as a start point. An end point is calculated according to the lookup table and the start point. A voltage and a current of the battery are measured until a measured voltage reaches a preset measurement confirmation voltage corresponding to the end point. A set electric charge is calculated according to the lookup table from the start point to the end point. An actual electric charge is calculated from the start point to the end point. The set electric charge is corrected according to a difference between the actual electric charge and the set electric charge.
    Type: Application
    Filed: April 16, 2014
    Publication date: November 20, 2014
    Applicant: uPI Semiconductor Corp.
    Inventor: Sei-Ching Yang
  • Patent number: 8711534
    Abstract: A battery power management system including a protection switch, a battery set, a high-voltage protection chip, a plurality of voltage-dividing units and a low-voltage measurement chip is provided. The protection switch and the battery set are connected in series between a first power terminal and a second power terminal of the battery power management system. The battery set includes a plurality of battery cells and has a plurality of sensing nodes. The high-voltage protection chip controls the protection switch according to a plurality of first sensing voltages from the sensing nodes. The voltage-dividing units are connected to a part of the sensing nodes and divide a part of the first sensing voltages to generate a plurality of second sensing voltages. The low-voltage measurement chip is connected to the voltage-dividing units and measures electric quantities of the battery cells according to the second sensing voltages.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 29, 2014
    Assignee: uPI Semiconductor Corp.
    Inventors: Sei-Ching Yang, Yu-Te Chou
  • Publication number: 20130038972
    Abstract: A battery power management system including a protection switch, a battery set, a high-voltage protection chip, a plurality of voltage-dividing units and a low-voltage measurement chip is provided. The protection switch and the battery set are connected in series between a first power terminal and a second power terminal of the battery power management system. The battery set includes a plurality of battery cells and has a plurality of sensing nodes. The high-voltage protection chip controls the protection switch according to a plurality of first sensing voltages from the sensing nodes. The voltage-dividing units are connected to a part of the sensing nodes and divide a part of the first sensing voltages to generate a plurality of second sensing voltages. The low-voltage measurement chip is connected to the voltage-dividing units and measures electric quantities of the battery cells according to the second sensing voltages.
    Type: Application
    Filed: July 9, 2012
    Publication date: February 14, 2013
    Applicant: UPI SEMICONDUCTOR CORP.
    Inventors: Sei-Ching Yang, Yu-Te Chou
  • Patent number: 7786695
    Abstract: A battery management system includes an external non-volatile memory and a battery management chip with embedded SRAM, CPU, ROM, and ROM_RAM encoder. The chip communicates with the non-volatile memory via standard protocols. While the battery management system is powered on or reset, a battery management program stored in the non-volatile memory is loaded to the embedded SRAM and the executed by CPU. As turning off this system, the program in the SRAM is then restored back the non-volatile memory. A battery protection IC is optionally embedded in the chip or externally connected with this chip to protect the battery from over-/under-voltage, over-current and short-circuit in both charge and discharge.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: August 31, 2010
    Assignee: Neotec Semiconductor Ltd.
    Inventors: Chang-Yu Ho, Hung-An Hsu, Sei-Ching Yang
  • Publication number: 20080197809
    Abstract: A battery management system includes an external non-volatile memory and a battery management chip with embedded SRAM, CPU, ROM, and ROM_RAM encoder. The chip communicates with the non-volatile memory via standard protocols. While the battery management system is powered on or reset, a battery management program stored in the non-volatile memory is loaded to the embedded SRAM and the executed by CPU. As turning off this system, the program in the SRAM is then restored back the non-volatile memory. A battery protection IC is optionally embedded in the chip or externally connected with this chip to protect the battery from over-/under-voltage, over-current and short-circuit in both charge and discharge.
    Type: Application
    Filed: October 3, 2007
    Publication date: August 21, 2008
    Inventors: Chang-Yu HO, Hung-An Hsu, Sei-Ching Yang
  • Patent number: 7051217
    Abstract: A method of state maintenance for a MMC system. The method includes using a plurality of signals, including a working voltage signal, a low voltage detection (LVD) signal, an LVD interrupt signal, a firmware polling signal, an LVD interrupt reset signal. The LVD signal responds to a voltage level of the working voltage at a preset voltage level. The LVD interrupt signal responds to the level of the LVD signal. After the LVD signal returns to the high level state and the firmware polling signal does the polling action to the LVD interrupt signal, then the LVD interrupt reset signal is issued to reset the LVD interrupt signal.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: May 23, 2006
    Assignee: Solid State System Co., Ltd.
    Inventors: Sei-Ching Yang, Chien-Chu Chan
  • Publication number: 20050039058
    Abstract: A method of state maintenance for a MMC system. The method includes using a plurality of signals, including a working voltage signal, a low voltage detection (LVD) signal, an LVD interrupt signal, a firmware polling signal, an LVD interrupt reset signal. The LVD signal responds to a voltage level of the working voltage at a preset voltage level. The LVD interrupt signal responds to the level of the LVD signal. After the LVD signal returns to the high level state and the firmware polling signal does the polling action to the LVD interrupt signal, then the LVD interrupt reset signal is issued to reset the LVD interrupt signal.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 17, 2005
    Inventors: Sei-Ching Yang, Chien-Chu Chan