Patents by Inventor Sei Fukushima

Sei Fukushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030332
    Abstract: A semiconductor device including: a channel layer; a spacer layer; an intermediate layer; and a barrier layer. The channel layer includes a first nitride semiconductor. The spacer layer includes a second nitride semiconductor having a larger band gap than a band gap of the first nitride semiconductor. The spacer layer is provided on the channel layer. The intermediate layer includes Alx1Iny1Ga(1-x1-y1)N(0<x1<1, 0<y1<1, and 0<x1+y1<1). The intermediate layer is provided on the spacer layer. The barrier layer includes Alx2In(1-x2)N(0<x2<1). The barrier layer is provided on the intermediate layer.
    Type: Application
    Filed: August 5, 2021
    Publication date: January 25, 2024
    Inventors: KUNIHIKO TASAI, TAKAHIRO KOYAMA, NORIYUKI FUTAGAWA, SEI FUKUSHIMA, YUYA KANITANI
  • Publication number: 20230207678
    Abstract: A semiconductor device includes a barrier layer, a channel layer, a regrowth layer, a vacancy generation region, and a source electrode or a drain electrode. The barrier layer includes a first nitride semiconductor. The channel layer includes a second nitride semiconductor and is bonded to the barrier layer at a first surface. The regrowth layer includes an n-type nitride semiconductor and is provided in a region dug deeper than an interface between the barrier layer and the channel layer from a second surface of the barrier layer. The second surface is on opposite side to the first surface. The vacancy generation region includes a nitrogen-capturing element and is provided in a region of the regrowth layer shallower than the interface between the barrier layer and the channel layer. The source electrode or the drain electrode is provided on the regrowth layer.
    Type: Application
    Filed: April 16, 2021
    Publication date: June 29, 2023
    Inventors: SEI FUKUSHIMA, YUYA KANITANI, MASASHI YANAGITA
  • Patent number: 8197594
    Abstract: Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ?20 ?m below the wafer surface in the range of 5×1011/cm3, and a density of BMDs with sizes of ?300 nm?1×107/cm3, exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: June 12, 2012
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Wilfried von Ammon, Sei Fukushima, Herbert Schmidt, Martin Weber
  • Patent number: 8142885
    Abstract: Silicon wafers and a process for their manufacture wherein both slip dislocation and occurrence of warpage are suppressed include heat treatment to provide wafers having plate-shaped BMDs, a density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm, of BMDs present in the bulk of the wafer at a distance of 50 ?m or more is 1×1011/cm3 or more, and the density of BMDs whose diagonal lengths are 750 nm or more in the wafer bulk is 1×107/cm3 or less, and the interstitial oxygen concentration is 5×1017 atoms/cm3 or less. The process involves low and high temperature heat treating at under defined temperature ramping rates.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: March 27, 2012
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Sei Fukushima
  • Patent number: 7558373
    Abstract: An x-ray generator comprising a vessel 1 in which a low pressure gas atmosphere is maintained, hemimorphic crystal supporting means 3a and 3b provided in the vessel, at least a pair of hemimorphic crystals 5a and 5b arranged oppositely at an interval and supported by the hemimorphic crystal supporting means in the vessel, and means 3a, 3b; 6b to 8a and 8b for elevating and lowering the temperature of the hemimorphic crystals. X-rays are radiated from the vessel as the temperature of the hemimorphic crystals is elevated or lowered.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: July 7, 2009
    Assignees: The Doshisha
    Inventors: Yoshikazu Nakanishi, Shinzo Yoshikado, Yoshiaki Ito, Shinji Fukao, Sei Fukushima
  • Publication number: 20080131679
    Abstract: Silicon wafers and a process for their manufacture wherein both slip dislocation and occurrence of warpage are suppressed include heat treatment to provide wafers having plate-shaped BMDs, a density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm, of BMDs present in the bulk of the wafer at a distance of 50 ?m or more is 1×1011/cm3 or more, and the density of BMDs whose diagonal lengths are 750 nm or more in the wafer bulk is 1×107/cm3 or less, and the interstitial oxygen concentration is 5×1017 atoms/cm3 or less. The process involves low and high temperature heat treating at under defined temperature ramping rates.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 5, 2008
    Applicant: SILTRONIC AG
    Inventors: Katsuhiko Nakai, Sei Fukushima
  • Publication number: 20080113171
    Abstract: Silicon wafers having a density of BMDs with sizes between 20 to 40 nm at positions ?20 ?m below the wafer surface in the range of 5×1011/cm3, and a density of BMDs with sizes of ?300 nm?1×107/cm3, exhibit reduced slip dislocation and warpage. The wafers are sliced from a crystal grown under specific conditions and then subjected to both low temperature heat-treatment and high temperature anneal.
    Type: Application
    Filed: September 19, 2007
    Publication date: May 15, 2008
    Applicant: SILTRONIC AG
    Inventors: Katsuhiko Nakai, Wilfried von Ammon, Sei Fukushima, Herbert Schmidt, Martin Weber
  • Publication number: 20070165784
    Abstract: An x-ray generator comprising a vessel 1 in which a low pressure gas atmosphere is maintained, hemimorphic crystal supporting means 3a and 3b provided in the vessel, at least a pair of hemimorphic crystals 5a and 5b arranged oppositely at an interval and supported by the hemimorphic crystal supporting means in the vessel, and means 3a, 3b; 6b to 8a and 8b for elevating and lowering the temperature of the hemimorphic crystals. X-rays are radiated from the vessel as the temperature of the hemimorphic crystals is elevated or lowered.
    Type: Application
    Filed: September 15, 2004
    Publication date: July 19, 2007
    Inventors: Yoshikazu Nakanishi, Shinzo Yoshikado, Yoshiaki Ito, Shinji Fukao, Sei Fukushima