Patents by Inventor Sei-Yang Yang

Sei-Yang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6701491
    Abstract: An interactive environment is provided for integrated circuit (IC) designers to do an emulation session on a hardware accelerator 111 and then move to simulator 131, and vice versa. An aspect of the present inventive solution swaps memory state and logic storage node state (such as flip-flops and latches) between the accelerator 111 and simulator 131. A complete context switch is performed to create a time shared environment on hardware accelerator 111 so that multiple IC designers can access and use the accelerator. Multiple memory pages can be incorporated to minimize state swap time. Multiple accelerators 111 can be interconnected with a plurality of simulators 131 and a plurality of workstations 101 to allow multiple designers to do interactive operations and allows shifting back and forth between hardware emulation and software simulation.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: March 2, 2004
    Inventor: Sei-Yang Yang
  • Publication number: 20030182641
    Abstract: An input and output probe system software according to the present invention, which is performed in an arbitrary computer for server, adds an additional circuit for probe capable of the input/output prove, to the design verification and examination object circuit so as to generate an extended circuit capable of the input/output probe in an automatic system. Interface module of the input/output probe connects a hardware board, wherein the extended circuit capable of the input/output prove is embodied in a hardware chip and a computer for server. Said interface module controls the performance of the hardware board, performs the input/output prove against the hardware chip on the hardware board under the specific situation or condition, thereby enabling the exchange of information on the performance results in respect to the design verification and the examination object circuit between the computer for server and the hardware chip.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Inventor: Sei-Yang Yang