Patents by Inventor Seigo Ando
Seigo Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9006854Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outType: GrantFiled: September 1, 2011Date of Patent: April 14, 2015Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Patent number: 8754445Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.Type: GrantFiled: January 20, 2012Date of Patent: June 17, 2014Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
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Patent number: 8729602Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control layeType: GrantFiled: September 1, 2011Date of Patent: May 20, 2014Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Publication number: 20130313608Abstract: A layer in which the potential level difference normally unrequired for device operation is generated is positively inserted in a device structure. The potential level difference has such a function that even if a semiconductor having a small bandgap is exposed on a mesa side surface, a potential drop amount of the portion is suppressed, and a leakage current inconvenient for device operation can be reduced. This effect can be commonly obtained for a heterostructure bipolar transistor, a photodiode, an electroabsorption modulator, and so on. In the photodiode, since the leakage current is alleviated, the device size can be reduced, so that in addition to improvement of operating speed with a reduction in series resistance, it is advantageous that the device can be densely disposed in an array.Type: ApplicationFiled: January 20, 2012Publication date: November 28, 2013Applicants: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT ELECTRONICS CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Toshihide Yoshimatsu, Haruki Yokoyama
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Patent number: 8575650Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.Type: GrantFiled: December 11, 2009Date of Patent: November 5, 2013Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
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Publication number: 20130168793Abstract: An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outType: ApplicationFiled: September 1, 2011Publication date: July 4, 2013Applicant: NTT ELECTRONICS CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Publication number: 20130154045Abstract: An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control layeType: ApplicationFiled: September 1, 2011Publication date: June 20, 2013Applicants: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Tadao Ishibashi, Seigo Ando, Masahiro Nada, Yoshifumi Muramoto, Haruki Yokoyama
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Publication number: 20110241150Abstract: An electron injected APD with an embedded n electrode structure in which edge breakdown can be suppressed without controlling the doping profile of an n-type region of the embedded n electrode structure with high precision. The APD comprising a buffer layer with a low ionization rate is inserted between an n electrode connecting layer and an avalanche multiplication layer. Specifically, the APD is an electron injected APD in which an n electrode layer, the n electrode connecting layer, the buffer layer, the avalanche multiplication layer, an electric field control layer, a band gap gradient layer, a low-concentration light absorbing layer, a p-type light absorbing layer, and a p electrode layer are sequentially stacked, and a light absorbing portion that includes at least the low-concentration light absorbing layer and the p-type light absorbing layer forms a mesa shape.Type: ApplicationFiled: December 11, 2009Publication date: October 6, 2011Inventors: Tadao Ishibashi, Seigo Ando, Yoshifumi Muramoto, Fumito Nakajima, Haruki Yokoyama
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Patent number: 7880197Abstract: In an electron-injection type APD, it is necessary to prevent a dark current increase and to secure the life time of the device. It is demanded to improve reliability of the APD with a lower production cost. With the InP buffer layer having an n-type doping region on the inside of a region defined by an optical absorption layer, a predetermined doping profile is achieved by ion implantation. Thus, electric field concentration in the avalanche multiplication layer is relaxed. Furthermore, a low-concentration second optical absorption layer is provided between the optical absorption layer and the avalanche multiplication layer. Responsivity of the optical absorption layer is maximized, and depletion of the lateral surface of the optical absorption layer is prevented; thus, electric field concentration is prevented. Preventing edge breakdown, the device improves its reliability.Type: GrantFiled: June 27, 2006Date of Patent: February 1, 2011Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota, Yoshifumi Muramoto
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Patent number: 7787736Abstract: The present invention relates to a semiconductor optoelectronic waveguide having a nin-type hetero structure which is able to stably operate an optical modulator. On the upper and lower surfaces of the core layer determined for the structure so that electro-optical effects are effectively exerted at an operating light wavelength and are provided with intermediate clad layers having a band gap which is greater than that of the core layer 11. Respectively on the upper and the lower surface of the intermediate clad layer are provided the clad layers having the band gap which is greater than those of the intermediate clad layers. On the upper surface of the clad layer are sequentially laminated a p-type layer and an n-type layer. In the applied voltage range used under an operating state, a whole region of the p-type layer and a part or a whole region of the n-type layer are depleted.Type: GrantFiled: July 15, 2008Date of Patent: August 31, 2010Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Ken Tsuzuki
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Publication number: 20100163925Abstract: In an electron-injection type APD, it is necessary to prevent a dark current increase and to secure the life time of the device. It is demanded to improve reliability of the APD with a lower production cost. With the InP buffer layer having an n-type doping region on the inside of a region defined by an optical absorption layer, a predetermined doping profile is achieved by ion implantation. Thus, electric field concentration in the avalanche multiplication layer is relaxed. Furthermore, a low-concentration second optical absorption layer is provided between the optical absorption layer and the avalanche multiplication layer. Responsivity of the optical absorption layer is maximized, and depletion of the lateral surface of the optical absorption layer is prevented; thus, electric field concentration is prevented. Preventing edge breakdown, the device improves its reliability.Type: ApplicationFiled: June 27, 2006Publication date: July 1, 2010Applicants: NTT ELECTRONICS CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota, Yoshifumi Muramoto
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Patent number: 7599595Abstract: The present invention relates to a semiconductor optoelectronic waveguide having a nin-type hetero structure which is able to stably operate an optical modulator. On the upper and lower surfaces of the core layer determined for the structure so that electro-optical effects are effectively exerted at an operating light wavelength and are provided with intermediate clad layers having a band gap which is greater than that of the core layer 11. Respectively on the upper and the lower surface of the intermediate clad layer are provided the clad layers having the band gap which is greater than those of the intermediate clad layers. On the upper surface of the clad layer are sequentially laminated a p-type layer and an n-type layer. In the applied voltage range used under an operating state, a whole region of the p-type layer and a part or a whole region of the n-type layer are depleted.Type: GrantFiled: October 4, 2004Date of Patent: October 6, 2009Assignees: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Ken Tsuzuki
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Patent number: 7557387Abstract: An ultra high speed APD capable of realizing reduction in an operating voltage and quantum efficiency enhancement at the same time is provided. Under operating conditions APD, a doping concentration distribution of each light absorbing layer is determined so that a p-type light absorbing layer (16) maintains a p-type neutrality except a part thereof, and a low concentration light absorbing layer (15) is depleted. Moreover, a ratio between a layer thickness WAD of the p-type light absorbing layer (16) and a layer thickness WAD of the low concentration light absorbing layer (15) is determined so that WAD>0.3 ?m and a delay time of an element response accompanying a transit of carriers generated in the light absorbing layer by light absorption takes on a local minimum under a condition that a layer thickness WA (=WAN+WAD) of the light absorbing layer is constant.Type: GrantFiled: February 3, 2005Date of Patent: July 7, 2009Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota
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Publication number: 20080304786Abstract: The present invention relates to a semiconductor optoelectronic waveguide having a nin-type hetero structure which is able to stably operate an optical modulator. On the upper and lower surfaces of the core layer determined for the structure so that electro-optical effects are effectively exerted at an operating light wavelength and are provided with intermediate clad layers having a band gap which is greater than that of the core layer 11. Respectively on the upper and the lower surface of the intermediate clad layer are provided the clad layers having the band gap which is greater than those of the intermediate clad layers. On the upper surface of the clad layer are sequentially laminated a p-type layer and an n-type layer. In the applied voltage range used under an operating state, a whole region of the p-type layer and a part or a whole region of the n-type layer are depleted.Type: ApplicationFiled: July 15, 2008Publication date: December 11, 2008Applicants: NTT Electronics Corporation, NIPPON Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Ken Tsuzuki
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Publication number: 20070200141Abstract: An ultra high speed APD capable of realizing reduction in an operating voltage and quantum efficiency enhancement at the same time is provided. Under operating conditions APD, a doping concentration distribution of each light absorbing layer is determined so that a p-type light absorbing layer (16) maintains a p-type neutrality except a part thereof, and a low concentration light absorbing layer (15) is depleted. Moreover, a ratio between a layer thickness WAN of the p-type light absorbing layer (16) and a layer thickness WAD of the low concentration light absorbing layer (15) is determined so that WAD>0.3 ?m and a delay time of an element response accompanying a transit of carriers generated in the light absorbing layer by light absorption takes on a local minimum under a condition that a layer thickness WA (=WAN+WAD) of the light absorbing layer is constant.Type: ApplicationFiled: February 3, 2005Publication date: August 30, 2007Applicants: NTT Electronics Corporation, Nippon Telegraph and Telephone CorporationInventors: Tadao Ishibashi, Seigo Ando, Yukihiro Hirota
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Publication number: 20070172184Abstract: The present invention relates to a semiconductor optoelectronic waveguide having a nin-type hetero structure which is able to stably operate an optical modulator. On the upper and lower surfaces of the core layer determined for the structure so that electro-optical effects are effectively exerted at an operating light wavelength and are provided with intermediate clad layers having a band gap which is greater than that of the core layer 11. Respectively on the upper and the lower surface of the intermediate clad layer are provided the clad layers having the band gap which is greater than those of the intermediate clad layers. On the upper surface of the clad layer are sequentially laminated a p-type layer and an n-type layer. In the applied voltage range used under an operating state, a whole region of the p-type layer and a part or a whole region of the n-type layer are depleted.Type: ApplicationFiled: October 4, 2004Publication date: July 26, 2007Inventors: Tadao Ishicashi, Seigo Ando, Ken Tsuzuki
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Thin film deposition method of nitride semiconductor and nitride semiconductor light emitting device
Patent number: 6920166Abstract: A masking material 13, which includes stripe-like openings 12 parallel to the [1-100] direction of a nitride semiconductor thin film, is formed on a substrate. Nitride semiconductor thin films 11 doped with Mg are grown on the openings 12 by selective-area growth. The nitride semiconductor thin films 11 are composed of a portion 14 formed as a result of the growth in the direction perpendicular to a (0001) principal plane, and a portion 15 formed as a result of the growth of {11-2x} facets (x=0, 1, 2). The Mg concentration of the portion 15 is made lower than that of the portion 14.Type: GrantFiled: March 17, 2003Date of Patent: July 19, 2005Assignee: Nippon Telegraph & Telephone CorporationInventors: Tetsuya Akasaka, Seigo Ando, Toshio Nishida, Naoki Kobayashi, Tadashi Saitoh -
Thin film deposition method of nitride semiconductor and nitride semiconductor light emitting device
Publication number: 20030179793Abstract: A masking material 13, which includes stripe-like openings 12 parallel to the [1-100] direction of a nitride semiconductor thin film, is formed on a substrate. Nitride semiconductor thin films 11 doped with Mg are grown on the openings 12 by selective-area growth. The nitride semiconductor thin films 11 are composed of a portion 14 formed as a result of the growth in the direction perpendicular to a (0001) principal plane, and a portion 15 formed as a result of the growth of {11-2x} facets (x=0, 1, 2). The Mg concentration of the portion 15 is made lower than that of the portion 14.Type: ApplicationFiled: March 17, 2003Publication date: September 25, 2003Applicant: Nippon Telegraph and Telephone CorporationInventors: Tetsuya Akasaka, Seigo Ando, Toshio Nishida, Naoki Kobayashi, Tadashi Saitoh -
Patent number: 5537038Abstract: A current of predetermined frequency is fed to a coil wound around a ferromagnetic core through a fixed impedance means. A magnetic flux measurement is performed in terms of a level of a DC component of a voltage generated across the coil. A DC bias is added to the current of predetermined frequency, and the resultant current is applied through the fixed impedance means to the coil wound around the ferromagnetic core. A magnetic flux measurement is performed in terms of a level of a DC component of the voltage across the coil. A magnetic flux measuring method and apparatus for embodying the same have a high sensitivity in detecting a minute magnetic flux and an improved temperature characteristic because an output voltage little varies against a temperature variation.Type: GrantFiled: February 14, 1995Date of Patent: July 16, 1996Assignee: NKK CorporationInventor: Seigo Ando
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Patent number: 5512821Abstract: A magnetic detector includes a magnetizer generating a magnetic field; a first magnetic sensor for detecting a leakage flux resulting from a magnetically defective portion of an object moving in and relative to the magnetic field; a low-pass filter for extracting a low-frequency signal component contained in the signal output by the magnetic sensor, the low-frequency signal component being indicative of a floating flux which crosses the magnetic sensor and is a result of the object moving through the magnetic field; an amplifier for amplifying the extracted low-frequency signal component; a compensating coil excited by the amplified low-frequency signal component output by the amplifier, for generating a magnetic flux which cancels out the floating flux crossing the magnetic sensor; a high-pass filter for extracting a signal resulting from the magnetically defective portion and contained in the signal that is output by the first magnetic sensor; an output amplifier for amplifying a signal output by the high-pType: GrantFiled: February 1, 1993Date of Patent: April 30, 1996Assignee: NKK CorporationInventors: Seigo Ando, Yasuhiro Matsufuji, Hiroshi Maki, Mamoru Inaba, Kenichi Iwanaga, Atsuhisa Takeoshi, Masaki Takenaka