Patents by Inventor Seigzumi Matsui

Seigzumi Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5119499
    Abstract: The execution of an instruction for one of co-processors is subrogated by information processing function implemented in the host-processor. When a co-processor identification code involved in the instruction for the co-processor agrees with a host-processor internal processing identification code set in the host-processor, the instruction decoder of the host-processor starts the information subrogating processing function. Thus, protocol control for communication from the host-processor to co-processors can be omitted so that a high-speed data processing becomes possible.
    Type: Grant
    Filed: May 25, 1989
    Date of Patent: June 2, 1992
    Assignees: Hitachi Ltd., Hitachi Mircocomputer Engineering Ltd.
    Inventors: Motonobu Tonomura, Seigzumi Matsui, Kouji Hashimoto