Patents by Inventor Seiichi Idei

Seiichi Idei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8214724
    Abstract: Provided is a transmitter for continuously and sequentially transmitting data with a variable unit for playback. The transmitter includes an obtaining section, a buffer, a computing section and a transmitting section. The obtaining section sequentially obtains segment data of the data to be transmitted. The buffer stores an error correction code to correct an error caused in the data by transmission. The computing section computes, every time newly obtained segment data reaches a predetermined size, XOR of the error correction code already stored in the buffer and the newly obtained segment data, and then updates the error correction code with the computed XOR. The transmitting section sequentially transmits the obtained segment data, as well as reads from the buffer and transmits the updated error correction code every time the computing section computes XOR for data in a size corresponding to the unit for playback.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Toshiro Hiromitsu, Seiichi Idei, Kazuaki Numano, Yasushi Tsukamoto
  • Publication number: 20090119566
    Abstract: Provided is a transmitter for continuously and sequentially transmitting data with a variable unit for playback. The transmitter includes an obtaining section, a buffer, a computing section and a transmitting section. The obtaining section sequentially obtains segment data of the data to be transmitted. The buffer stores an error correction code to correct an error caused in the data by transmission. The computing section computes, every time newly obtained segment data reaches a predetermined size, XOR of the error correction code already stored in the buffer and the newly obtained segment data, and then updates the error correction code with the computed XOR. The transmitting section sequentially transmits the obtained segment data, as well as reads from the buffer and transmits the updated error correction code every time the computing section computes XOR for data in a size corresponding to the unit for playback.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 7, 2009
    Inventors: Toshiro Hiromitsu, Seiichi Idei, Kazuaki Numano, Yasushi Tsukamoto
  • Patent number: 7436657
    Abstract: The present invention is directed to a device for illuminating a keyboard or other portion of a PC main body unit of a portable computer (e.g., a convertible PC that can be used as a notebook PC or a tablet PC) by utilizing a center latch mechanism. An embodiment of the invention includes a latch provided in the vicinity of an upper edge of the cover unit, and a latch receiving portion provided in the main-body unit. When the cover unit is closed, the latch receiving portion is engaged with the latch to secure the main-body unit and the cover unit in a position where the cover unit is closed. A light source is embedded in the cover unit in the vicinity of the latch, and a light-reflecting surface provided on a surface of the latch so that, when the cover unit is open, light from the light source can be reflected to the keyboard to illuminate the keyboard.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: October 14, 2008
    Assignee: International Business Machines Corporation
    Inventors: Seiji Motai, Seiichi Idei, Taketoshi Kohno, Noboru Aoyama
  • Publication number: 20070253182
    Abstract: The present invention is directed to a device for illuminating a keyboard or other portion of a PC main body unit of a portable computer (e.g., a convertible PC that can be used as a notebook PC or a tablet PC) by utilizing a center latch mechanism. An embodiment of the invention includes a latch provided in the vicinity of an upper edge of the cover unit, and a latch receiving portion provided in the main-body unit. When the cover unit is closed, the latch receiving portion is engaged with the latch to secure the main-body unit and the cover unit in a position where the cover unit is closed. A light source is embedded in the cover unit in the vicinity of the latch, and a light-reflecting surface provided on a surface of the latch so that, when the cover unit is open, light from the light source can be reflected to the keyboard to illuminate the keyboard.
    Type: Application
    Filed: March 26, 2007
    Publication date: November 1, 2007
    Inventors: Seiji Motai, Seiichi Idei, Taketoshi Kohno, Noboru Aoyama
  • Patent number: 7253586
    Abstract: A method for charging at least one battery, includes: determining a status of at least one parameter for the battery, where the at least one parameter comprises a closeness to a desired charge level; determining that the battery is to be charged during a peak usage time period; and determining a priority rating for the battery based upon the at least one parameter, where a battery closer to the desired charge level has a higher priority rating. The battery is then charged according to it priority rating. When batteries are to be charged for an off-peak usage time period, the charge rates of the batteries are adjusted based upon the available time for the charge. In this manner, quick recharged battery availability is provided during peak usage time periods, while battery life is prolonged during off-peak usage time periods.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: August 7, 2007
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: P. Daniel Kangas, Toshiro Hiromitsu, Seiichi Idei
  • Patent number: 7239112
    Abstract: A method for compensating for overcharging of at least one battery includes calculating a charge rate for the at least one battery, comparing an overcharge accumulator value for the at least one battery with a maximum time limit value, comparing the calculated charge rate with a nominal charge rate for the at least one battery, if the overcharge accumulator value is less than the maximum time limit value, incrementing the overcharge accumulator value if the calculated charge rate is higher than the nominal charge rate, if the overcharge accumulator value is less than the maximum time limit value, decrementing the overcharge accumulator value if the calculated charge rate is lower than the nominal charge rate (if the overcharge accumulator value is less than the maximum time limit value), setting the charge rate for the at least one battery to the calculated charge rate (if the overcharge accumulator value is less than the maximum time limit value), and setting the charge rate for the at least one battery to t
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: July 3, 2007
    Assignee: International Business Machines Corporation
    Inventors: P. Daniel Kangas, Toshiro Hiromitsu, Seiichi Idei
  • Publication number: 20050248316
    Abstract: A method for compensating for overcharging of at least one battery includes calculating a charge rate for the at least one battery, comparing an overcharge accumulator value for the at least one battery with a maximum time limit value, comparing the calculated charge rate with a nominal charge rate for the at least one battery, if the overcharge accumulator value is less than the maximum time limit value, incrementing the overcharge accumulator value if the calculated charge rate is higher than the nominal charge rate, if the overcharge accumulator value is less than the maximum time limit value, decrementing the overcharge accumulator value if the calculated charge rate is lower than the nominal charge rate (if the overcharge accumulator value is less than the maximum time limit value), setting the charge rate for the at least one battery to the calculated charge rate (if the overcharge accumulator value is less than the maximum time limit value), and setting the charge rate for the at least one battery to t
    Type: Application
    Filed: May 10, 2004
    Publication date: November 10, 2005
    Applicant: International Business Machines Corporation
    Inventors: P. Kangas, Toshiro Hiromitsu, Seiichi Idei
  • Publication number: 20050200332
    Abstract: A method for charging at least one battery, includes: determining a status of at least one parameter for the battery, where the at least one parameter comprises a closeness to a desired charge level; determining that the battery is to be charged during a peak usage time period; and determining a priority rating for the battery based upon the at least one parameter, where a battery closer to the desired charge level has a higher priority rating. The battery is then charged according to it priority rating. When batteries are to be charged for an off-peak usage time period, the charge rates of the batteries are adjusted based upon the available time for the charge. In this manner, quick recharged battery availability is provided during peak usage time periods, while battery life is prolonged during off-peak usage time periods.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 15, 2005
    Applicant: International Business Machines Corporation
    Inventors: P. Kangas, Toshiro Hiromitsu, Seiichi Idei
  • Patent number: 5821818
    Abstract: This single voltage controlled oscillator for a PLL circuit has two control loops: a low noise ration is maintained by a main loop; while a wide frequency capture range is ensured by a sub-loop controlled by a one-chip microcomputer. The main control loop is a low gain loop with a narrow capture range that compares the phase of the output of the PLL circuit with the phase of a horizontal synchronous video signal supplied to a LCD display. The sub-loop is a high gain loop with a broad frequency range that includes a processor that monitors the lock on the main loop. When the lock is broken, the processor increments or decrements the voltage supplied to this sub-loop in one or more steps until the lock is reestablished, and the PLL circuit is again operating within the narrow capture range of the low gain loop.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: October 13, 1998
    Assignee: International Business Machines Corporation
    Inventors: Seiichi Idei, Takuya Ishikawa