Abstract: A semiconductor device with a damascene wiring structure which can prevent short-circuits between a seal ring and a wiring line or electrode pad. An upper layer barrier layer made from a conductive barrier material film is formed on an interlayer insulating film groove sidewall of the semiconductor device. Embedded in the groove is an upper layer seal ring wiring line with thickness of approximately 10 micrometers for instance, in which a plurality of isolated pockets of insulators are disbursed. These isolated pockets of insulators are formed using the interlayer insulating film which forms the damascene wiring line. Additionally, a first upper layer groove wiring line and a second upper layer groove wiring line are formed in an element forming region, and an upper layer barrier layer is formed on the outside perimeter. The upper layer seal ring wiring line and both upper layer wiring lines all have damascene wiring structures.

Abstract: A semiconductor device with a damascene wiring structure which can prevent short-circuits between a seal ring and a wiring line or electrode pad. The upper layer barrier layer made from a conductive barrier material film is formed on the interlayer insulating film groove sidewall of the semiconductor device, an upper layer seal ring wiring line with the thickness of approximately 10 micrometers for instance made from a wiring material film is embedded in a groove, and a plurality of isolated pockets of insulators are formed to be disbursed in the upper layer seal ring wiring line. These isolated pockets of insulators formed using the interlayer insulating film which forms the aforementioned damascene wiring line. Furthermore, a first upper layer groove wiring line and a second upper layer groove wiring line are formed in the element forming region, and an upper layer barrier layer is formed on the outside perimeter.