Patents by Inventor Seiichi Maruno

Seiichi Maruno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10338997
    Abstract: An apparatus includes a first external terminal, a first circuit, a signal line and a second circuit. The first external terminal receives at least one of data mask information and data bus inversion information. The first circuit performs one of an error check operation and a data bus inversion operation. The signal line is coupled between the first external terminal and the first circuit. The second circuit is coupled to the signal line and first a voltage level of the signal line at a substantially constant level responsive to a first control signal.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: July 2, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Chiaki Dono, Seiichi Maruno, Taihei Shido, Toshio Ninomiya, Chikara Kondo
  • Publication number: 20180293128
    Abstract: An apparatus includes a first external terminal, a first circuit, a signal line and a second circuit. The first external terminal receives at least one of data mask information and data bus inversion information. The first circuit performs one of an error check operation and a data bus inversion operation. The signal line is coupled between the fist external terminal and the first circuit. The second circuit is coupled to the signal line and first a voltage level of the signal line at a substantially constant level responsive to a first control signal.
    Type: Application
    Filed: May 17, 2018
    Publication date: October 11, 2018
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Chiaki Dono, Seiichi Maruno, Taihei Shido, Toshio Ninomiya, Chikara Kondo
  • Patent number: 9983925
    Abstract: A control circuit receives the mode signals supplied from a mode register and a read enable signal READ supplied from a control logic circuit, which activates enable signals EN1 to EN3 based on the mode signals and read enable signal. For example, the read enable signal READ is activated when a read command is issued from the controller. One mode signal can indicate an operation mode in which a multi-purpose register is used, and another mode signal can indicate an operation mode in which the data bus inversion function is used. When a data masking operation is disabled and an error check operation is enabled, the mode register activates a protection signal SEL. When the data masking operation is enabled or the error check operation is disabled, the protection signal SEL is deactivated. The operation of a deserializer is controlled by clock signals and the protection signal SEL.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: May 29, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Chiaki Dono, Seiichi Maruno, Taihei Shido, Toshio Ninomiya, Chikara Kondo
  • Publication number: 20160034340
    Abstract: An apparatus includes a first external terminal, a first circuit, a signal line and a second circuit, The first external terminal receives at least one of data mask information and data bus inversion information. The first circuit performs one of an error check operation and as data bus invasion operation. The signal line is coupled between the first external terminal and the first circuit. The second circuit is coupled to the signal line and first a voltage level of the signal line at a substantially constant level responsive to a first control signal.
    Type: Application
    Filed: April 3, 2015
    Publication date: February 4, 2016
    Inventors: CHIAKI DONO, Seiichi Maruno, Taihei Shido, Toshio Ninomiya, Chikara Kondo
  • Patent number: 8947128
    Abstract: Disclosed herein is a device that includes an input receiver circuit activated by a strobe signal to generate an output signal by comparing a potential of an input signal with a reference potential, and a noise canceller cancelling noise superimposed on the reference potential due to a change in the strobe signal.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: February 3, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Chiaki Dono, Seiji Narui, Seiichi Maruno