Patents by Inventor Seiichi Morimoto
Seiichi Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079238Abstract: A bonded object production method according to an embodiment uses a continuous furnace to process a stacked body including a metal member, a ceramic member, and a brazing material layer located therebetween, while conveying the stacked body; and the method includes a process of heating the stacked body in an inert atmosphere from 200° C. to a bonding temperature at an average temperature raising rate of the stacked body of not less than 15° C./min, a process of bonding the stacked body in an inert atmosphere at the bonding temperature that is within a range of not less than 600° C. and not more than 950° C., and a process of cooling the stacked body from the bonding temperature to 200° C. at an average temperature lowering rate of the stacked body of not less than 15° C./min. A ceramic substrate is favorably a silicon nitride substrate.Type: ApplicationFiled: November 14, 2023Publication date: March 7, 2024Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA MATERIALS CO., LTD.Inventors: Hiromasa KATO, Masanori HOSHINO, Hideaki HIRABAYASHI, Seiichi SUENAGA, Kazumitsu MORIMOTO
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Patent number: 11466987Abstract: The present invention reduces measurement time. A gyroscope of the present invention includes a planar ion trap part, a microwave irradiation part, a laser irradiation part and a measurement part. The planar ion trap part includes two rf electrodes and two DC electrode rows, and forms ion traps that trap one ion on a substrate, a normal direction of the surface of the planar ion trap part corresponds to a z direction. The rf electrodes are disposed in the x direction on the substrate at a predetermined interval. The DC electrode rows are disposed in the x direction on the substrate so as to sandwich the two rf electrodes. The DC electrode rows each include at least five DC electrodes in the x direction. The trapped ions are spaced so as not to interfere with each other. The microwave irradiation part irradiates the ions with ?/2 microwave pulses.Type: GrantFiled: July 25, 2018Date of Patent: October 11, 2022Assignees: TOKYO INSTITUTE OF TECHNOLOGY, OSAKA UNIVERSITY, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Mikio Kozuma, Ryotaro Inoue, Takashi Mukaiyama, Utako Tanaka, Seiichi Morimoto, Kazunori Yoshioka, Atsushi Tanaka, Yuichiro Kamino
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Patent number: 10968339Abstract: Antioxidant-containing expandable resin particles including composite resin particles containing 100 to 400 parts by mass of polystyrene-based resin relative to 100 parts by mass of polypropylene-based resin, and a blowing agent and an antioxidant contained in the composite resin particles, wherein the polypropylene-based resin is abundantly present on the surface of the composite resin particles and poorly present at the center of the particles, and the composite resin particles contain 150 to 1500 ppm of antioxidant.Type: GrantFiled: September 27, 2016Date of Patent: April 6, 2021Assignee: SEKISUI PLASTICS CO., LTD.Inventor: Seiichi Morimoto
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Publication number: 20200333139Abstract: A gyroscope of the present invention includes a moving standing light wave generator to generate three moving standing light waves, an atomic beam source to continuously generate an atomic beam in which individual atoms are in the same state, an interference device that exerts a Sagnac effect through interaction between the atomic beam and the three moving standing light waves and a monitor to detect angular velocity or acceleration by monitoring an atomic beam from the interference device. The atoms are alkaline earth metal atoms, alkaline earth-like metal atoms, stable isotopes of alkaline earth metal atoms or stable isotopes of alkaline earth-like metal atoms.Type: ApplicationFiled: July 25, 2018Publication date: October 22, 2020Applicants: TOKYO INSTITUTE OF TECHNOLOGY, OSAKA UNIVERSITY, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Mikio KOZUMA, Ryotaro INOUE, Takashi MUKAIYAMA, Seiichi MORIMOTO, Kazunori YOSHIOKA, Atsushi TANAKA, Yuichiro KAMINO
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Publication number: 20200318968Abstract: A gyroscope of the present invention includes a moving standing light wave generator to generate three moving standing light waves, an atomic beam source to continuously generate an atomic beam in which individual atoms are in the same state, an interference device that exerts a Sagnac effect through interaction between the atomic beam and the three moving standing light waves, and a monitor to detect angular velocity or acceleration by monitoring an atomic beam from the interference device. Each moving standing light wave satisfies an n-th order Bragg condition, where n is a positive integer of 2 or more.Type: ApplicationFiled: July 25, 2018Publication date: October 8, 2020Applicants: TOKYO INSTITUTE OF TECHNOLOGY, OSAKA UNIVERSITY, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Mikio KOZUMA, Ryotaro INOUE, Takashi MUKAIYAMA, Seiichi MORIMOTO, Kazunori YOSHIOKA, Atsushi TANAKA, Yuichiro KAMINO
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Publication number: 20200300630Abstract: The present invention reduces measurement time. A gyroscope of the present invention includes a planar ion trap part, a microwave irradiation part, a laser irradiation part and a measurement part. The planar ion trap part includes two rf electrodes and two DC electrode rows, and forms ion traps that trap one ion on a substrate, a normal direction of the surface of the planar ion trap part corresponds to a z direction. The rf electrodes are disposed in the x direction on the substrate at a predetermined interval. The DC electrode rows are disposed in the x direction on the substrate so as to sandwich the two rf electrodes. The DC electrode rows each include at least five DC electrodes in the x direction. The trapped ions are spaced so as not to interfere with each other. The microwave irradiation part irradiates the ions with ?/2 microwave pulses.Type: ApplicationFiled: July 25, 2018Publication date: September 24, 2020Applicants: TOKYO INSTITUTE OF TECHNOLOGY, OSAKA UNIVERSITY, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Mikio KOZUMA, Ryotaro INOUE, Takashi MUKAIYAMA, Utako TANAKA, Seiichi MORIMOTO, Kazunori YOSHIOKA, Atsushi TANAKA, Yuichiro KAMINO
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Publication number: 20200256677Abstract: A gyroscope includes an atomic beam source to generate an atomic beam in which individual atoms are in the same state, a moving standing light wave generator to generate M moving standing light waves, an interference device to obtain an atomic beam resulting from the interaction between the atomic beam and the M moving standing light waves, a monitor to detect angular velocity by monitoring the atomic beam from the interference device and an accelerometer. The accelerometer acquires information on acceleration applied to the gyroscope and the moving standing light wave generator adjusts the drift velocity of at least M?1 moving standing light waves among the M moving standing light waves in response to the acceleration information.Type: ApplicationFiled: July 25, 2018Publication date: August 13, 2020Applicants: TOKYO INSTITUTE OF TECHNOLOGY, OSAKA UNIVERSITY, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Mikio KOZUMA, Ryotaro INOUE, Takashi MUKAIYAMA, Seiichi MORIMOTO, Kazunori YOSHIOKA, Atsushi TANAKA, Yuichiro KAMINO
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Publication number: 20190085160Abstract: Antioxidant-containing expandable resin particles including composite resin particles containing 100 to 400 parts by mass of polystyrene-based resin relative to 100 parts by mass of polypropylene-based resin, and a blowing agent and an antioxidant contained in the composite resin particles, wherein the polypropylene-based resin is abundantly present on the surface of the composite resin particles and poorly present at the center of the particles, and the composite resin particles contain 150 to 1500 ppm of antioxidant.Type: ApplicationFiled: September 27, 2016Publication date: March 21, 2019Applicant: SEKISUI PLASTICS CO., LTD.Inventor: Seiichi MORIMOTO
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Patent number: 8334184Abstract: Techniques are disclosed for fabricating FinFET transistors (e.g., double-gate, trigate, etc). A sacrificial gate material (such as polysilicon or other suitable material) is deposited on fin structure, and polished to remove topography in the sacrificial gate material layer prior to gate patterning. A flat, topography-free surface (e.g., flatness of 50 nm or better, depending on size of minimum feature being formed) enables subsequent gate patterning and sacrificial gate material opening (via polishing) in a FinFET process flow. Use of the techniques described herein may manifest in structural ways. For instance, a top gate surface is relatively flat (e.g., flatness of 5 to 50 nm, depending on minimum gate height or other minimum feature size) as the gate travels over the fin. Also, a top down inspection of gate lines will generally show no or minimal line edge deviation or perturbation as the line runs over a fin.Type: GrantFiled: December 23, 2009Date of Patent: December 18, 2012Assignee: Intel CorporationInventors: Joseph M. Steigerwald, Uday Shah, Seiichi Morimoto, Nancy Zelick
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Publication number: 20110147812Abstract: Techniques are disclosed for fabricating FinFET transistors (e.g., double-gate, trigate, etc). A sacrificial gate material (such as polysilicon or other suitable material) is deposited on fin structure, and polished to remove topography in the sacrificial gate material layer prior to gate patterning. A flat, topography-free surface (e.g., flatness of 50 nm or better, depending on size of minimum feature being formed) enables subsequent gate patterning and sacrificial gate material opening (via polishing) in a FinFET process flow. Use of the techniques described herein may manifest in structural ways. For instance, a top gate surface is relatively flat (e.g., flatness of 5 to 50 nm, depending on minimum gate height or other minimum feature size) as the gate travels over the fin. Also, a top down inspection of gate lines will generally show no or minimal line edge deviation or perturbation as the line runs over a fin.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Inventors: Joseph M. Steigerwald, Uday Shah, Seiichi Morimoto, Nancy Zelick
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Patent number: 7405419Abstract: A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions.Type: GrantFiled: December 28, 2005Date of Patent: July 29, 2008Assignee: Intel CorporationInventors: Reza M. Golzarian, Robert P. Meagley, Seiichi Morimoto, Mansour Moinpour
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Publication number: 20060228884Abstract: A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions.Type: ApplicationFiled: December 28, 2005Publication date: October 12, 2006Inventors: Reza Golzarian, Robert Meagley, Seiichi Morimoto, Mansour Moinpour
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Patent number: 7084053Abstract: A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions.Type: GrantFiled: September 30, 2003Date of Patent: August 1, 2006Assignee: Intel CorporationInventors: Reza M. Golzarian, Robert P. Meagley, Seiichi Morimoto, Mansour Moinpour
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Publication number: 20050070096Abstract: A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions.Type: ApplicationFiled: September 30, 2003Publication date: March 31, 2005Inventors: Reza Golzarian, Robert Meagley, Seiichi Morimoto, Mansour Moinpour
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Patent number: 6081272Abstract: A method for optimally sizing dummy structures in an integrated circuit design is disclosed. Adjacent dummy structures are merged to provide a composite merged dummy structure. Each side of a first dummy structure representation is expanded in a lateral direction by a predetermined distance such that the first dummy structure representation merges with an adjacent second dummy structure representation forming the composite merged dummy structure. The composite merged dummy structure is then examined to determine if it exceeds a predetermined size. If the composite merged dummy structure exceeds the predetermined size, then the composite merged dummy structure is contracted to fit within predetermined perimeters.Type: GrantFiled: September 30, 1997Date of Patent: June 27, 2000Assignee: Intel CorporationInventors: Seiichi Morimoto, Timothy L. Deeter
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Patent number: 5911111Abstract: A polishing process for polysilicon gate patterning improvement using standard patterning techniques in the manufacture of high performance metal oxide semiconductor (MOS) devices. The addition of a short silicon polish step, after deposition and before patterning of a polysilicon layer reduces the non-planarity normally associated with polysilicon. Polysilicon polishing removes the surface roughness in the polysilicon layer caused by the grain structure of polysilicon and the surface roughness due to the replication of the underlying topography of the isolation and substrate regions. The described method for removal of both types of surface roughness leaves the polysilicon layer planarized without increasing the defect level already associated with the manufacture of high performance MOS devices.Type: GrantFiled: September 2, 1997Date of Patent: June 8, 1999Assignee: Intel CorporationInventors: Mark T. Bohr, Lawrence N. Brigham, Peter K. Moon, Seiichi Morimoto
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Patent number: 5672095Abstract: A method and apparatus for polishing a film formed over a semiconductor substrate. The substrate is pressed up against an abrasive pad so that the film contacts the pad. The pad has a diameter which is less than approximately two times a diameter of the substrate. While pressure is applied to the back of the substrate, the pad is rotated with respect to the wafer and an abrasive ceria slurry is introduced onto the pad to polish the film.Type: GrantFiled: September 29, 1995Date of Patent: September 30, 1997Assignee: Intel CorporationInventors: Seiichi Morimoto, Ebrahim Andideh
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Patent number: 5198732Abstract: A control system for a progressive wave type ultrasonic motor including an ultrasonic motor driver circuit which supplies driving electric power to an ultrasonic motor and a rotary encoder which is coupled with an output shaft of the ultrasonic motor and generates a pulse signal in accordance with rotation of the ultrasonic motor, comprising a reference clock signal generator which generates a clock signal and a phase locked loop circuit which transmits a control signal to an ultrasonic motor driver circuit based on the clock signal and the pulse signal from the rotary encoder, and controlling the speed of the ultrasonic motor; and a control apparatus, comprising a driving control means which transmits a driving signal to an ultrasonic motor driver in accordance with a command pulse instructing to start driving of the ultrasonic motor and transmits a suspension signal to the ultrasonic motor driver in accordance with the pulse signal from the rotary encoder, and driving the ultrasonic motor intermittently.Type: GrantFiled: August 27, 1991Date of Patent: March 30, 1993Assignee: Mitsubishi Jukogyo Kabushiki KaishaInventor: Seiichi Morimoto
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Patent number: 5127196Abstract: An improved method for planarizing the surface of an dielectric deposited over a semiconductor substrate. The substrate is pressed face down against a table which has been coated with an abrasive material. In this way, the upper surface of the interlayer dielectric contacts the abrasive. Rotational movement of the wafer relative to the table facilitates removal of the protruding portions of the interlayer dielectric by the abrasive. Post-planarization step height variation is minimized by simultaneously cooling the table and the abrasive material during the abrasive or polishing process. By maintaining the table and the abrasive at about 10 degrees Celcius the step height variation is reduced by a factor of 2 over that normally realized in the prior art.Type: GrantFiled: February 20, 1991Date of Patent: July 7, 1992Assignee: Intel CorporationInventors: Seiichi Morimoto, Robert J. Patterson
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Patent number: 5104828Abstract: An improved method for planarizing the surface of an dielectric deposited over a semiconductor substrate. The substrate is pressed face down against a table which has been coated with an abrasive material. In this way, the upper surface of the interlayer dielectric contacts the abrasive. Rotational movement of the wafer relative to the table facilitates removal of the protruding portions of the interlayer dielectric by the abrasive. Post-planarization step height variation is minimized by simultaneously cooling the table and the abrasive material during the abrasive or polishing process. By maintaining the table and the abrasive at about 10 degrees Celsius the step height variation is reduced by a factor of 2 over that normally realized in the prior art.Type: GrantFiled: March 1, 1990Date of Patent: April 14, 1992Assignee: Intel CorporationInventors: Seiichi Morimoto, Robert J. Patterson