Abstract: Provided is a heat treatment method wherein generation of slip dislocation in silicon wafer RTP is suppressed, in order to solve a problem of not sufficiently suppressing generation of slip dislocation of silicon wafers in conventional RTP. A step is provided for suspending temperature rising for 10 seconds or longer at a temperature in a range of over 700° C. to below 950° C., so as to prevent generation of slip dislocation during rapid heating, at least at a silicon wafer portion that contacts with a supporting section of a rapid heating apparatus or at a portion on the outermost circumference section of the silicon wafer.

Abstract: A simple method for evaluating the dielectric breakdown of an oxide layer on a silicon wafer is disclosed. The SPV method is utilized to measure a diffusion length L.sub.on of minority carriers when the silicon wafer is illuminated by white light from another source and a diffusion length L.sub.off of the minority carriers when the silicon wafer is not illuminated by white light from another source. A diffusion length L.sub.safe, which is determined by trap sites in the silicon wafer, is calculated from an equation L.sub.safe =(L.sub.off.sup.-2 -L.sub.on.sup.-2).sup.-1/2. Since L.sub.safe has a strong correlation with the dielectric breakdown of the oxide layer, the dielectric breakdown of the oxide layer can be easily evaluated by L.sub.safe during the fabrication of the silicon wafer.