Patents by Inventor Seiichi Shundo

Seiichi Shundo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5598373
    Abstract: A defect remedy LSI mounted on a memory module, comprising: an input interface portion for capturing address and control signals, the input interface portion being the same as that of a dynamic RAM; an input/output interface portion corresponding to a data bus of a memory device comprised of a plurality of dynamic random access memories; a memory circuit to which a chip address and an X defective address of any of the plurality of random access memories are electrically written, the memory circuit being substantially made nonvolatile; a redundancy remedy RAM portion composed of a static RAM wherein a word line is selected by a compare match signal between an X address signal and the defective address of the memory circuit, the X address signal and the defective address being captured via the input interface portion, and a column is selected by a Y address signal captured via the input interface portion; a selecting portion for connecting a data input/output bus of the redundancy remedy RAM portion to an input
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 28, 1997
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Shoji Wada, Kanehide Kenmizaki, Masaya Muranaka, Masahiro Ogata, Hidetomo Aoyagi, Tetsuya Kitame, Masahiro Katayama, Shoji Kubono, Yukihide Suzuki, Makoto Morino, Sinichi Miyatake, Seiichi Shundo, Yoshihisa Koyama, Nobuhiko Ohno