Patents by Inventor Seiichi Suenaga

Seiichi Suenaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6116016
    Abstract: A gas turbine apparatus having a plurality of stages of rotor.stator blade and utilizing fuel containing 0.5 ppm or more of vanadium. A plurality of stages of the rotor.stator blade have a stage which is driven by combustion gas not including vanadium corrosion suppressing agent and a stage which is driven by combustion gas including vanadium corrosion suppressing agent and is controlled in its combustion gas temperature at below 1,458 K. In addition, the plurality of stages of the gas turbine are supplied with different kinds of combustion gases according to the temperature of each stage. Or, by disposing at least two systems of fuel supplying mechanism to one combustion chamber, the combustion temperature is controlled according to the kinds and the mixing ratio of the fuels. Therewith, while suppressing corrosion of high temperature member due to V and S, the deposition of the reaction products due to the vanadium corrosion suppressing agent and the like can be suppressed.
    Type: Grant
    Filed: January 12, 1998
    Date of Patent: September 12, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kunihiko Wada, Seiichi Suenaga, Kazuhiro Yasuda, Hiroki Inagaki, Masako Nakahashi, Atsuhiko Izumi, Tetsuzou Sakamoto
  • Patent number: 6086945
    Abstract: A method of forming a polycrystalline silicon thin layer, which comprises the steps of forming a silicon thin film on a surface of a heat resistant substrate by making use of polycrystalline silicon fine particles as a raw material, and heating the silicon thin film thereby to recrystallize the silicon thin film and hence to enlarge an average particle diameter of the polycrystalline silicon fine particles. The silicon thin film is formed by depositing the polycrystalline silicon fine particles directly on the surface of the substrate, and meets a relationship represented by the following formula (1)W.sub.A /(V.sub.S .multidot.d.sub.S).gtoreq.0.95 (1)wherein W.sub.A is the weight of the polycrystalline silicon fine particles which is actually deposited on the surface of the substrate, V.sub.S is a volume of the silicon thin film which is deposited on the surface of the substrate, and d.sub.S is a density of silicon (Si).
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: July 11, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Kamata, Hiroki Inagaki, Seiichi Suenaga, Hiromitsu Takeda
  • Patent number: 6071627
    Abstract: A ceramic coating layer which is not less than 70 .mu.m in the maximum height Rmax of its profile curves and not less than 45 .mu.m in the 10-point average roughness, or which is less than 650 HV in Vickers hardness is provided on a metallic substrate. A heat-resistant member of such composition is excellent in thermal fatigue resistance and keeps an excellent heat resistance for a long period of time. Quality of a heat-resistant member is evaluated by, measuring at least one of roughness and hardness of a ceramic coating layer on a metallic substrate. According to this method, it is possible to easily and accurately evaluate a thermal resistant life of a heat-resistant member.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: June 6, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Yasuda, Seiichi Suenaga, Kunihiko Wada, Hiroki Inagaki, Masako Nakahashi
  • Patent number: 5955182
    Abstract: A heat resisting member having ceramics heat shield layers which is directly formed on a metal base material or formed on it via a metal bonded layer formed on the metal base material. The ceramics heat shield layers comprise a first ceramics layer which is formed on the metal base material or the metal bonded layer and has a high elastic modulus, high hardness and high density, and a second ceramics layer which is formed on the first ceramics layer and has a low elastic modulus, low hardness and low density. Delamination from the neighborhood of the interface or oxidation of the lower layer can be prevented by the first ceramics layer which is formed on the metal base material or the metal bonded layer. Thermal shock resistance and heat shielding effect of the ceramics heat shield layers as the whole can be enhanced by the second ceramics layer.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: September 21, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Yasuda, Seiichi Suenaga, Kunihiko Wada, Hiroki Inagaki, Masako Nakahashi
  • Patent number: 5579534
    Abstract: A heat-resistant member is constructed by having a ceramic coating layer deposited on the surface of a metallic substrate through the medium of a metallic bonding layer. The metallic bonding layer is composed of at least two layers, i.e. a layer of an aggregate of minute particles disposed on the metallic substrate side and a layer of an aggregate of coarse particles disposed on the ceramic coating layer side. Otherwise, the metallic bonding layer is composed of at least three layers, i.e. two layers of an aggregate of coarse particles disposed one each on the metallic substrate side and the ceramic coating layer side and one layer of an aggregate of minute particles interposed between these two layers of an aggregate of coarse particles. These layers are obtained by the low pressure ambient plasma thermal spraying using a fine powder or a coarse powder of an alloy resistant to corrosion and oxidation.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: November 26, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masayuki Itoh, Kazuhiro Yasuda, Kunihiko Wada, Seiichi Suenaga, Shinji Arai
  • Patent number: 5056702
    Abstract: A method of manufacturing a semiconductor device comprising a ceramics cylinder, a metal seal member closing an open end of the cylinder, a semiconductor element located within the cylinder and having electrodes, and leads or electrodes connected to the electrodes of the semiconductor element and extending from the cylinder. The method comprises the steps of coating powder of active metal consisting of Ti and/or Zr on the end face of the ceramics cylinder without heating the ceramics cylinder, in an amount of 0.1 mg/cm.sup.2 to 10 mg/cm.sup.2, mounting a layer of brazing filler metal on the end face of the ceramics cylinder, which have been coated with the powder of the active metal, placing the metal seal member on the layer of brazing filler metal, and heating the ceramics cylinder, the metal seal member, and the layer of brazing filler metal, thereby melting the layer of brazing filler metal and, thus, brazing the metal seal member to the open end of the ceramics cylinder.
    Type: Grant
    Filed: October 10, 1989
    Date of Patent: October 15, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masako Nakahashi, Makoto Shirokane, Hiromitsu Takeda, Tatsuo Yamazaki, Tsutomu Okutomi, Shozi Niwa, Mikio Okawa, Mitsutaka Homma, Seiichi Suenaga, Shigeru Miyakawa