Patents by Inventor Seiichi TAKASU

Seiichi TAKASU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8638117
    Abstract: Provided is a manufacturing apparatus that manufactures an integrated circuit package by packaging an integrated circuit chip, the manufacturing apparatus comprising a flattening section that flattens the integrated circuit chip; a holding section that holds a base substrate; a transporting section that transports the flattened integrated circuit chip to load the integrated circuit chip on the base substrate held by the holding section; and a packaging section that packages the integrated circuit chip and the base substrate as the integrated circuit package.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: January 28, 2014
    Assignee: Advantest Corporation
    Inventors: Yoshinari Kogure, Seiichi Takasu, Sadaki Tanaka
  • Publication number: 20110089550
    Abstract: Provided is a manufacturing apparatus that manufactures an integrated circuit package by packaging an integrated circuit chip, the manufacturing apparatus comprising a flattening section that flattens the integrated circuit chip; a holding section that holds a base substrate; a transporting section that transports the flattened integrated circuit chip to load the integrated circuit chip on the base substrate held by the holding section; and a packaging section that packages the integrated circuit chip and the base substrate as the integrated circuit package.
    Type: Application
    Filed: September 9, 2010
    Publication date: April 21, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Yoshinari KOGURE, Seiichi TAKASU, Sadaki TANAKA