Patents by Inventor Seiichiro Ohashi

Seiichiro Ohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150368518
    Abstract: Protective film-laminated adhesive sheets which include; an adhesive sheet including a support having first and second surfaces and a resin composition layer in contact with the second surface of the support; and a protective film having first and second surfaces with the second surface of the protective film in contact with the resin composition layer of the adhesive sheet and in which the first surface of the protective film has an arithmetic mean roughness (Rap1) of 100 nm or more, and the second surface of the protective film has an arithmetic mean roughness (Rap2) of 100 nm or more are capable of suppressing a winding displacement when the sheet is wound into a roll and are capable of preventing a resin separation when the protective film is peeled off in an automatic cutter device.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 24, 2015
    Applicant: Ajinomoto Co., Inc.
    Inventors: Kenji KAWAI, Shigeo NAKAMURA, Yukinori EDO, Seiichiro OHASHI
  • Patent number: 9060456
    Abstract: Multilayer printed wiring boards may be prepared by forming a via hole by laser irradiation in insulating layer formed by a prepreg, comprised of a glass cloth impregnated with a thermosetting resin composition, and subjecting the via hole to a glass etching treatment with a glass etching solution and then to a desmear treatment with an oxidizing agent solution. By such a process, etch back phenomenon and excessive protrusion of glass cloth from the wall surface of a via hole can be sufficiently suppressed, and a highly reliable via can be formed. Particularly, a highly reliable via can be formed in a small via hole having a top diameter of 75 ?m or below.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: June 16, 2015
    Assignees: AJINOMOTO CO., INC., SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Seiichiro Ohashi, Eiichi Hayashi, Shigeo Nakamura, Takaaki Yazawa, Junichi Nakamura
  • Patent number: 8992713
    Abstract: Multi-layer printed wiring boards may be produced by: (1) conveying an adhesive sheet from an adhesive sheet roll wherein an adhesive sheet having a prepreg formed on a support film is wound in a roll and placing the adhesive sheet such that a prepreg surface contacts one or both of the surfaces of a circuit board, (2) partially adhering the adhesive sheet to the circuit board by heating and pressing a part of the adhesive sheet from the support film side, and cutting the adhesive sheet according to the size of the circuit board with a cutter, (3) heating and pressing the temporarily fitted adhesive sheet under reduced pressure to laminate the adhesive sheet on the circuit board, (4) forming an insulating layer by thermally curing the prepreg, and (5) detaching the support film after the thermal curing step.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 31, 2015
    Assignee: Ajinomoto Co., Inc.
    Inventors: Shigeo Nakamura, Seiichiro Ohashi, Eiichi Hayashi, Tadahiko Yokota
  • Publication number: 20130319749
    Abstract: Multilayer printed wiring boards may be prepared by forming a via hole by laser irradiation in insulating layer formed by a prepreg, comprised of a glass cloth impregnated with a thermosetting resin composition, and subjecting the via hole to a glass etching treatment with a glass etching solution and then to a desmear treatment with an oxidizing agent solution. By such a process, etch back phenomenon and excessive protrusion of glass cloth from the wall surface of a via hole can be sufficiently suppressed, and a highly reliable via can be formed. Particularly, a highly reliable via can be formed in a small via hole having a top diameter of 75 ?m or below.
    Type: Application
    Filed: August 7, 2013
    Publication date: December 5, 2013
    Applicants: SHINKO ELECTRIC INDUSTRIES CO., LTD., AJINOMOTO CO., INC.
    Inventors: Seiichiro OHASHI, Eiichi Hayashi, Shigeo Nakamura, Takaaki Yazawa, Junichi Nakamura
  • Patent number: 8533942
    Abstract: Multilayer printed wiring boards may be prepared by forming a via hole by laser irradiation in insulating layer formed by a prepreg, comprised of a glass cloth impregnated with a thermosetting resin composition, and subjecting the via hole to a glass etching treatment with a glass etching solution and then to a desmear treatment with an oxidizing agent solution. By such a process, etch back phenomenon and excessive protrusion of glass cloth from the wall surface of a via hole can be sufficiently suppressed, and a highly reliable via can be formed. Particularly, a highly reliable via can be formed in a small via hole having a top diameter of 75 ?m or below.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: September 17, 2013
    Assignees: Ajinomoto Co., Inc., Shinko Electric Industries Co., Ltd.
    Inventors: Seiichiro Ohashi, Eiichi Hayashi, Shigeo Nakamura, Takaaki Yazawa, Junichi Nakamura
  • Publication number: 20130067742
    Abstract: Multi-layer printed wiring boards may be produced by: (1) conveying an adhesive sheet from an adhesive sheet roll wherein an adhesive sheet having a prepreg formed on a support film is wound in a roll and placing the adhesive sheet such that a prepreg surface contacts one or both of the surfaces of a circuit board, (2) partially adhering the adhesive sheet to the circuit board by heating and pressing a part of the adhesive sheet from the support film side, and cutting the adhesive sheet according to the size of the circuit board with a cutter, (3) heating and pressing the temporarily fitted adhesive sheet under reduced pressure to laminate the adhesive sheet on the circuit board, (4) forming an insulating layer by thermally curing the prepreg, and (5) detaching the support film after the thermal curing step.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: AJINOMOTO CO., INC.
    Inventors: Shigeo NAKAMURA, Seiichiro OHASHI, Eiichi Hayashi, Tadahiko Yokota
  • Patent number: 8337655
    Abstract: A production method of a multi-layer printed wiring board containing the following steps (1)-(5): (1) a temporary fitting preparatory step including conveying an adhesive sheet from an adhesive sheet roll wherein an adhesive sheet having a prepreg formed on a support film is wound in a roll and placing the adhesive sheet such that a prepreg surface contacts one or both of the surfaces of a circuit board, (2) a temporary fitting step for temporarily fitting the adhesive sheet to the circuit board, including partially adhering the adhesive sheet to the circuit board by heating and pressing a part of the adhesive sheet from the support film side, and cutting the adhesive sheet according to the size of the circuit board with a cutter, (3) a laminating step including heating and pressing the temporarily fitted adhesive sheet under reduced pressure to laminate the adhesive sheet on the circuit board, (4) a thermal curing step including forming an insulating layer by thermally curing the prepreg, and (5) a detachin
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: December 25, 2012
    Assignee: Ajinomoto Co., Inc.
    Inventors: Shigeo Nakamura, Seiichiro Ohashi, Eiichi Hayashi, Tadahiko Yokota
  • Publication number: 20100206471
    Abstract: A production method of a multi-layer printed wiring board containing the following steps (1)-(5): (1) a temporary fitting preparatory step including conveying an adhesive sheet from an adhesive sheet roll wherein an adhesive sheet having a prepreg formed on a support film is wound in a roll and placing the adhesive sheet such that a prepreg surface contacts one or both of the surfaces of a circuit board, (2) a temporary fitting step for temporarily fitting the adhesive sheet to the circuit board, including partially adhering the adhesive sheet to the circuit board by heating and pressing a part of the adhesive sheet from the support film side, and cutting the adhesive sheet according to the size of the circuit board with a cutter, (3) a laminating step including heating and pressing the temporarily fitted adhesive sheet under reduced pressure to laminate the adhesive sheet on the circuit board, (4) a thermal curing step including forming an insulating layer by thermally curing the prepreg, and (5) a detachin
    Type: Application
    Filed: March 11, 2010
    Publication date: August 19, 2010
    Applicant: AJINOMOTO CO., INC.
    Inventors: Shigeo Nakamura, Seiichiro Ohashi, Eiichi Hayashi, Tadahiko Yokota
  • Publication number: 20090133910
    Abstract: Multilayer printed wiring boards may be prepared by forming a via hole by laser irradiation in insulating layer formed by a prepreg, comprised of a glass cloth impregnated with a thermosetting resin composition, and subjecting the via hole to a glass etching treatment with a glass etching solution and then to a desmear treatment with an oxidizing agent solution. By such a process, etch back phenomenon and excessive protrusion of glass cloth from the wall surface of a via hole can be sufficiently suppressed, and a highly reliable via can be formed. Particularly, a highly reliable via can be formed in a small via hole having a top diameter of 75 ?m or below.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 28, 2009
    Applicants: AJINOMOTO CO., INC, SHINKO ELECTRIC INDUSTRIES CO.,LTD.
    Inventors: Seiichiro OHASHI, Eiichi Hayashi, Shigeo Nakamura, Takaaki Yazawa, Junichi Nakamura