Abstract: A vibrator device includes a vibrator element, and a support substrate configured to support the vibrator element. The vibrator element includes a drive arm provided with a drive signal electrode and a drive constant-potential electrode, and a detection arm provided with a detection signal electrode and a detection constant-potential electrode. The support substrate includes a base, and a drive signal interconnection electrically coupled to the drive signal electrode, a drive constant-potential interconnection electrically coupled to the drive constant-potential electrode, and a detection signal interconnection electrically coupled to the detection signal electrode all provided to the base, and the drive arm includes a first surface located at the support substrate side, and a second surface located at an opposite side to the first surface. Further, the drive constant-potential electrode is disposed on the first surface, and the drive signal electrode is disposed on the second surface.

Abstract: An angular velocity detection element includes: a drive vibration arm configured to perform flexural vibration according to an applied drive signal; and a detection vibration arm configured to perform flexural vibration according to an applied angular velocity. Each of the drive vibration arm and the detection vibration arm has a bottomed groove portion along an extending direction. d2/t2>d1/t1, in which t1 is a thickness of the drive vibration arm, d1 is a depth of the groove portion of the drive vibration arm, t2 is a thickness of the detection vibration arm, and d2 is a depth of the groove portion of the detection vibration arm.

Abstract: A vibrator device includes a vibrating body having obverse and reverse principal surfaces and a side surface connecting the obverse and reverse principal surfaces to each other, a package configured to house the vibrating body, and a bonding material configured to fix the vibrating body to the package, wherein the vibrating body has a coupling part including a recess recessed from the side surface toward a center of the principal surfaces, and a protrusion protruding from a side surface of the recess, the protrusion is one of breaking-off parts with which a plurality of the vibrating bodies is broken off from a wafer to which the plurality of the vibrating bodies is coupled, and the bonding material has contact with a side surface of the protrusion in the recess.

Abstract: Described are processes for developing laminated circuit boards, as well as the resulting circuit boards themselves. Accordingly, at least two circuit boards at least partially overlap each other, and at least one through-hole is formed in an overlapping region thereof. The through-hole is filled with an electrically-conductive material, forming a through-via that enables the circuit boards to be electrically connected. When a circuit on each circuit board is laid out so that a part thereof reaches a region in which the through-via is to be formed, then that part of the circuit can be electrically connected to the through-via. Thus, portions of the circuits on the circuit boards can be electrically connected to each other via common through-vias to realize an integrated device in which the circuits on the laminated circuit boards function.

Abstract: Active matrix array devices are constituted by devices that have a function such as those of a display/light emitting device, a sensor, a memory or an actuator, and are arranged in a matrix array shape, and the expansion of usage in various fields and applications is expected. However, there is little similarity and compatibility in the forming process and materials between a device such as a display/light emitting device, a sensor, a memory, or an actuator, and a circuit portion that controls such a device in the matrix element, and therefore the device and the circuit portion are mutually restricting factors. This results in an increase in the manufacturing cost and limitation of the function. A conventional active matrix array device is manufactured by performing various process steps on the same substrate. Control circuit portions each including a transistor are formed in some of the process steps.

Abstract: Research on practical realization of various types of printable devices has progressed, and the realization of devices in which these printable devices are integrated on a flexible board is expected. However, there is the problem that, if a plurality of printable devices are simply integrated on the same board, the area of the integrated device increases, and the yield ratio greatly decreases. An integration technique that solves the problem of an increase in the area and a decrease in the yield ratio is in demand. Electronic devices to be integrated are formed on individual boards, the boards are laid to overlap each other in a predetermined relationship, and then through-vias are formed at predetermined positions. With this, the electronic devices are electrically connected to each other, and function as an integrated device.

Abstract: An active matrix LED display formed on a substrate material having flexibility is provided. The display includes a pixel forming unit having at least one pixel driving circuit and at least one inorganic LED element electrically connected with the pixel driving circuit. The pixel driving circuit is formed of at least one thin film transistor, and the thin film transistor is an organic thin film transistor.

Abstract: Active matrix array devices are constituted by devices that have a function such as those of a display/light emitting device, a sensor, a memory or an actuator, and are arranged in a matrix array shape, and the expansion of usage in various fields and applications is expected. However, there is little similarity and compatibility in the forming process and materials between a device such as a display/light emitting device, a sensor, a memory, or an actuator, and a circuit portion that controls such a device in the matrix element, and therefore the device and the circuit portion are mutually restricting factors. This results in an increase in the manufacturing cost and limitation of the function. A conventional active matrix array device is manufactured by performing various process steps on the same substrate. Control circuit portions each including a transistor are formed in some of the process steps.

Abstract: Research on practical realization of various types of printable devices has progressed, and the realization of devices in which these printable devices are integrated on a flexible board is expected. However, there is the problem that, if a plurality of printable devices are simply integrated on the same board, the area of the integrated device increases, and the yield ratio greatly decreases. An integration technique that solves the problem of an increase in the area and a decrease in the yield ratio is in demand. Electronic devices to be integrated are formed on individual boards, the boards are laid to overlap each other in a predetermined relationship, and then through-vias are formed at predetermined positions. With this, the electronic devices are electrically connected to each other, and function as an integrated device.

Abstract: A simulation instructing unit instructs a simulation unit, which generates signal characteristics, to generate the signal characteristics. A characteristic value extracting unit extracts, from the signal characteristics, characteristic values for distinguishing between a signal characteristic generated by setting a first simulation parameter and a signal characteristic generated by a second simulation parameter. A simulation parameter determining unit determines a first mapping relationship from the characteristic values to the simulation parameters with the characteristic values obtained by setting a plurality of set values in the simulation parameters and with the set values.

Abstract: A recording medium stores a verification program that causes a computer to execute detecting from a model circuit, a first circuit representing junction of a source region and a substrate region and including a junction resistance and a junction capacitance, a second circuit parallel to the first circuit, representing junction of a drain region and the substrate region, and including a junction resistance and a junction capacitance equivalent to the junction resistance and capacitance of the first circuit, and a connection resistance connecting the circuits and a substrate electrode; calculating, using the junction resistances and connection resistance, a first coefficient indicating impact of the junction resistances and connection resistance on amplitude variation; calculating, using the junction capacitances and connection resistance, a second coefficient indicating impact of the junction capacitances and connection resistance on phase variation; correcting the junction capacitances using a sum of the coef

Abstract: A recording medium stores a verification program that causes a computer to execute detecting from a model circuit, a first circuit representing junction of a source region and a substrate region and including a junction resistance and a junction capacitance, a second circuit parallel to the first circuit, representing junction of a drain region and the substrate region, and including a junction resistance and a junction capacitance equivalent to the junction resistance and capacitance of the first circuit, and a connection resistance connecting the circuits and a substrate electrode; calculating, using the junction resistances and connection resistance, a first coefficient indicating impact of the junction resistances and connection resistance on amplitude variation; calculating, using the junction capacitances and connection resistance, a second coefficient indicating impact of the junction capacitances and connection resistance on phase variation; correcting the junction capacitances using a sum of the coef

Abstract: A simulation instructing unit instructs a simulation unit, which generates signal characteristics, to generate the signal characteristics. A characteristic value extracting unit extracts, from the signal characteristics, characteristic values for distinguishing between a signal characteristic generated by setting a first simulation parameter and a signal characteristic generated by a second simulation parameter. A simulation parameter determining unit determines a first mapping relationship from the characteristic values to the simulation parameters with the characteristic values obtained by setting a plurality of set values in the simulation parameters and with the set values.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: The semiconductor device includes: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: NMOS transistors N3 and N3S are connected in series between a PMOS transistor P1 and an NMOS transistor N1S constituting a first inverter connected between a power supply potential VDD2, which satisfies VDD1<VDD2, and a ground potential VSS, and likewise, NMOS transistors N4 and N4S are connected in series between a PMOS transistor P2 and an NMOS transistor N2S constituting a second inverter. The gate insulating films of the MOS transistors P1, P2, N3 and N4 are thicker than those of the transistors N1S and N4S. The gates of the NMOS transistors N3 and N4 are connected to VDD2, the gates of NMOS transistors N3S and N4S are connected to VDD1 and these transistors are constantly on.

Abstract: The semiconductor device comprises: a conducting layer including: a channel region; a source region and a drain region sandwiching the channel region; and a body region connected to the channel region and being adjacent to the source region and the drain region; a gate electrode formed above the channel region interposing a gate insulation film therebetween; a dummy electrode formed on the body region near the interface between at least the drain region and the body region, and electrically insulated with the gate electrode; and a body contact region formed in the body region except a region where the dummy electrode is formed. The gate electrode and the dummy electrode are electrically insulated with each other, whereby the semiconductor device having body contacts can have a gate capacitance much decreased. Accordingly, deterioration of the speed performance of the transistors can be suppressed.

Abstract: A mask includes a transparent layer which is transparent with respect to a light which is used for an exposure, and a mask pattern layer which is formed on the transparent layer. At least a portion of the mask pattern layer is made up solely of a phase shift layer for transmitting the light, so that a phase shift occurs between a phase of the light transmitted through the phase shift layer and a phase of the light transmitted through a portion of the mask having no phase shift layer.

Abstract: A mask includes a transparent layer which is transparent with respect to a light which is used for an exposure, and a mask pattern layer which is formed on the transparent layer. At least a portion of the mask pattern layer is made up solely of a phase shift layer for transmitting the light, so that a phase shift occurs between a phase of the light transmitted through the phase shift layer and a phase of the light transmitted through a portion of the mask having no phase shift layer.