Abstract: A level shifter and a charge pump circuit are added, among cascade-connected unit frequency dividing circuits forming a frequency dividing circuit, to the unit frequency dividing circuit in the first stage. The charge pump circuit boosts an input voltage based on a dot clock signal, and supplies the booster voltage to the unit frequency dividing circuit in the first stage. The unit frequency dividing circuit in the first stage, which is driven by the booster voltage, attains an improved current driving capability. The improved current driving capability of the unit frequency dividing circuit in the first stage to which the dot clock signal of high frequency is input leads to a widened operating margin of the frequency dividing circuit.

Abstract: A first gate driver circuit scans gate lines in one direction, and has its gate pulse output stages capable of having high impedance in response to an external signal. A second gate driver circuit scans gate lines in one but different direction from the first gate driver circuit, and has its gate pulse output stages capable of having high impedance in response to the external signal. When one of the first and second gate driver circuits is operating under the control of the external signal, the respective gate pulse output stages of the other gate driver circuit have high impedance. Consequently, a plurality of shifting techniques such as a scan direction switching function of gate lines in an image display device including a-Si gate driver circuits can be implemented.

Abstract: A level shifter and a charge pump circuit are added, among cascade-connected unit frequency dividing circuits forming a frequency dividing circuit, to the unit frequency dividing circuit in the first stage. The charge pump circuit boosts an input voltage based on a dot clock signal, and supplies the booster voltage to the unit frequency dividing circuit in the first stage. The unit frequency dividing circuit in the first stage, which is driven by the booster voltage, attains an improved current driving capability. The improved current driving capability of the unit frequency dividing circuit in the first stage to which the dot clock signal of high frequency is input leads to a widened operating margin of the frequency dividing circuit.

Abstract: In a transmissive liquid crystal display device, a liquid crystal display panel includes an image display portion and a light-receiving window portion. When the ambient light is sufficient, a backlight is turned off and the light-receiving window portion is set to a light-transmitting state, to take the external light into the backside of the liquid crystal display panel so as to display an image. When the ambient light is insufficient, the backlight is turned on and the light-receiving window portion is set to a light-blocking state, to display the image with the light from the backlight. Thus, the device configuration is simplified compared to the case of opening/closing a light-receiving window by using a movable blocking plate.

Abstract: When a voltage is supplied from a voltage supply terminal to a non-inverted input terminal of an operational amplifier, a voltage equal to the supply voltage is input to an inverted input terminal and also to a voltage apply terminal for a load. When PNP transistors constituting a current mirror turn on in response to the applied voltage, a source current flows through one of the PNP transistors to the load, and a mirror current of the source current flows through the other of the PNP transistors to a current measuring terminal. The current driven to the load can be obtained by measuring the mirror current with an amperemeter.

Abstract: When a voltage is supplied from a voltage supply terminal to a non-inverted input terminal of an operational amplifier, a voltage equal to the supply voltage is input to an inverted input terminal and also to a voltage apply terminal for a load. When PNP transistors constituting a current mirror turn on in response to the applied voltage, a source current flows through one of the PNP transistors to the load, and a mirror current of the source current flows through the other of the PNP transistors to a current measuring terminal. The current driven to the load can be obtained by measuring the mirror current with an amperemeter.