Patents by Inventor Seiji Goto

Seiji Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200330561
    Abstract: Object: To provide a composition for treatment of facial nerve palsy having less invasiveness and sufficient therapeutic effect. Resolution means: A composition and a kit for treatment of facial nerve palsy in which a substance having a nerve regeneration effect is carried on a carrier made of a bioabsorbable polymer. In particular, a composition for treatment of facial nerve palsy in which an insulin-like growth factor 1 (IGF-1) is carried on a gelatin sponge and a kit capable of preparing the composition.
    Type: Application
    Filed: June 6, 2019
    Publication date: October 22, 2020
    Inventors: Seiji KAKEHATA, Tsukasa ITO, Takatoshi FURUKAWA, Motoyasu SUGIYAMA, Takanari GOTO
  • Publication number: 20200327633
    Abstract: A delivery vehicle management system stores a delivery plan information regarding a traveling scheduled path of each of a plurality of delivery vehicles, acquires a position information indicating a current position of each delivery vehicle, calculates an expected arrival time for each delivery vehicle to reach a cross dock based on the delivery plan information and the position information of each delivery vehicle, specifies the delivery vehicle in which a standby time occurs when each delivery vehicle is permitted to use the cross dock in an order in which the expected arrival time is earlier, and a length of the standby time of each delivery vehicle, and notifies a driver of the delivery vehicle specified by the specifying unit of a time point delayed from the expected arrival time by the length of the standby time as a time point at which use of the cross dock can be started.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 15, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Junichi Goto, Masao Hitomi, Yu Nishikata, Kousuke Matsuyama, Maiko Eguchi, Seiji Kuroki, Hiroaki Kawahara, Yohei Tanigawa, Yoshihisa Sugano, Hiroaki Takahashi, Tomoyuki Tanaka, Kosuke Katou, Tokihiro Motoyama
  • Publication number: 20200302069
    Abstract: In a processing apparatus having semiconductor integrated circuits, a first status monitoring circuit included in a first semiconductor integrated circuit is configured to instruct a plurality of second semiconductor integrated circuits to transmit status information indicating statuses of the plurality of second semiconductor integrated circuits. When a second status monitoring circuit included in each of the plurality of second semiconductor integrated circuits receives the instruction for transmission of the corresponding status information, the second status monitoring circuit transmits encrypted information in which the status information is encrypted to the first semiconductor integrated circuit.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Inventors: Seiji Goto, Eiichi NIMODA
  • Publication number: 20200265169
    Abstract: The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
    Type: Application
    Filed: May 6, 2020
    Publication date: August 20, 2020
    Applicant: SOCIONEXT INC.
    Inventors: Seiji GOTO, Jun KAMADA, Taiji TAMIYA
  • Patent number: 10713292
    Abstract: According to one embodiment, a document analysis apparatus is an apparatus comprising first document storage circuit for storing first documents that include words, belong to respective categories constituting a hierarchical structure, and only comprise opinion documents for a desirable object, and a second document storage circuit for storing second documents that include words, belong or do not belong to the categories constituting the hierarchical structure and comprise opinion documents for the desirable object and documents other than the opinion documents, and the apparatus is configured to classify, into one of the categories constituting the hierarchical structure, the second documents that do not belong to the respective categories among the second documents stored in the second document storage circuit.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: July 14, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA SOLUTIONS CORPORATION
    Inventors: Yasunari Miyabe, Kazuyuki Goto, Shigeru Matsumoto, Saori Nitta, Shozo Isobe, Seiji Egawa
  • Patent number: 10685145
    Abstract: The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: June 16, 2020
    Assignee: SOCIONEXT INC.
    Inventors: Seiji Goto, Jun Kamada, Taiji Tamiya
  • Publication number: 20200175758
    Abstract: An isosurface mesh M is generated by extracting voxels having a certain CT value from volume data obtained by X-ray CT. A gradient vector g of a CT value is calculated at each vertex p of the isosurface mesh M. A plurality of sample points S are generated in positive and negative directions of the calculated gradient vector g. Gradient norms N of CT values at the respective generated sample points S are calculated. The vertex p of the isosurface mesh is moved and corrected to a sample point Sm having the maximum norm Nm calculated.
    Type: Application
    Filed: November 7, 2019
    Publication date: June 4, 2020
    Applicants: THE UNIVERSITY OF TOKYO, MITUTOYO CORPORATION
    Inventors: Yutaka OHTAKE, Yukie NAGAI, Tomonori GOTO, Seiji SASAKI, Masato KON
  • Patent number: 10668929
    Abstract: A vehicle drive assistance system is provided, which includes one or more processors configured to execute a general driver model learning engine configured to build a general driver model to be applied to a plurality of drivers based on driving data of the drivers, an individual driver model learning engine configured to build an individual driver model unique to a specific driver based on driving data of the driver, and an on-board controller provided in a vehicle operated by the driver. The individual driver model learning engine includes a vehicle control updating program configured to cause the on-board controller to update vehicle control processing based on the general and individual driver models. The vehicle control updating program acquires the driver models and, according to a given condition, determines a driver model based on which the vehicle control processing is updated, between the general and individual driver models.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: June 2, 2020
    Assignee: Mazda Motor Corporation
    Inventors: Takahiro Tochioka, Seiji Goto, Hideki Okano, Kazuhiro Ikeda
  • Patent number: 10497946
    Abstract: A first sealing member includes a first flat sealing portion facing a first electrode, a second flat sealing portion, and a first protruding sealing portion. The second flat sealing portion is opposite to the first electrode in the stacking direction. The first protruding sealing portion protrudes from the second flat sealing portion in the stacking direction and includes a crossing portion at which the first protruding sealing portion diverges. A second sealing member includes a third flat sealing portion facing a second electrode, a second protruding sealing portion, and a block-shaped seal. The second protruding sealing portion protrudes from the third flat sealing portion in the stacking direction. The block-shaped seal is disposed in a region corresponding to the crossing portion viewed in a stacking direction and protruding from the third flat sealing portion apart from the second protruding sealing portion.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: December 3, 2019
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Shuhei Goto, Seiji Sugiura, Kentaro Ishida
  • Patent number: 10410301
    Abstract: A system for planning operation of a power plant capable of a first mode driving a power generator using a turbine and a second mode not driving the power generator using the turbine over a predetermined period. A determination unit determines whether a predicted power-selling price is higher than a power generation cost; and a planning unit calculates a loss index of the first and second modes in a case where the predicted selling price is equal to the generation cost or less within the predetermined period and formulates a plan to operate the power plant in a mode having a smaller loss index. The loss index of the first mode includes a power-selling loss that is a difference between the predicted selling price and the generation cost, and the loss index of the second mode includes a loss that is caused by not driving the power generator.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: September 10, 2019
    Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Makoto Kishi, Atsushi Matsuo, Seiji Goto, Yo Akiyama
  • Patent number: 10398069
    Abstract: A method for manufacturing an electronic component, and a device for manufacturing the electronic component, which can easily achieve alignment by inserting multilayer chips into cavities formed in a pallet, and form external electrodes with a high degree of dimensional accuracy. A plurality of multilayer chips each composed of a laminated body with a plurality of ceramic layers and a plurality of internal electrode layers is inserted into each of a plurality of cavities formed in a pallet, and the plurality of multilayer chips is aligned by moving each of the plurality of multilayer chips to one of inner wall surfaces forming the cavity. A conductive ink is applied onto ends of the plurality of aligned multilayer chips, including the upper surface of the pallet, and the conductive ink applied is dried to form external electrodes on the plurality of multilayer chips.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: August 27, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Seiji Goto, Takahiro Hirao
  • Patent number: 10385045
    Abstract: Provided is an EP2 agonist having excellent safety. A compound represented by general formula (I) (wherein all symbols are as defined in the description), a salt or N-oxide of the compound, or a solvate or prodrug of the compound or the salt or N-oxide has an EP2 agonist activity and is highly safe, and is therefore useful as a medicine, particularly a therapeutic agent for diseases associated with EP2 receptors, such as immune diseases, allergic diseases, neuronal death, dysmenorrhea, premature birth, miscarriage, baldness, ocular diseases, erectile dysfunction, arthritis, lung injury, pulmonary fibrosis, pulmonary emphysema, bronchitis, chronic obstructive pulmonary disease, bone diseases and cartilage injury.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: August 20, 2019
    Assignee: ONO PHARMACEUTICAL CO., LTD.
    Inventors: Seiji Ogawa, Toshihide Watanabe, Isamu Sugimoto, Kousuke Tani, Kazumi Moriyuki, Yoshikazu Goto, Shinsaku Yamane
  • Publication number: 20190251049
    Abstract: Processing by an information processing system is speeded up. A first semiconductor integrated circuit designates a first address of a memory connected to a second semiconductor integrated circuit that is a data transmission destination, based on first memory map information in which addresses of memories respectively used by the semiconductor integrated circuits are defined, converts the first address to a second address of the memory defined in second memory map information referred to by the data transmission destination, and outputs the second address and transmission data by using a PCIe interface. A switch transfers the second address and the transmission data to the data transmission destination by using PCIe interfaces. The data transmission destination receives the second address and the transmission data by using a PCIe interface and writes the transmission data into the reception buffer region of the memory corresponding to the second address.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Inventors: Seiji GOTO, Eiichi NIMODA, Satoru OKAMOTO
  • Patent number: 10369664
    Abstract: The yield of a manufacturing process of a semiconductor device is increased. The mass productivity of the semiconductor device is increased. The semiconductor device is manufactured by performing a step of performing plasma treatment on a first surface of a substrate; a step of forming a first layer over the first surface with the use of a material containing a resin or a resin precursor; a step of forming a resin layer by performing heat treatment on the first layer; and a step of separating the substrate and the resin layer from each other. In the plasma treatment, the first surface is exposed to an atmosphere containing one or more of hydrogen, oxygen, and water vapor.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: August 6, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Seiji Yasumoto, Naoto Goto, Satoru Idojiri
  • Publication number: 20190236314
    Abstract: The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 1, 2019
    Applicant: SOCIONEXT INC.
    Inventors: Seiji GOTO, Jun KAMADA, Taiji TAMIYA
  • Patent number: 10331602
    Abstract: A semiconductor integrated circuit includes a bus signal line and a test signal line arranged adjacent to the bus signal line. The semiconductor integrated circuit has a system mode, which is an operation mode that uses the bus signal line, and a scan mode, which is an operation mode that uses the test signal line. The semiconductor integrated circuit fixes the logic level of the test signal line adjacent to the bus signal line in the system mode that uses the bus signal line. The semiconductor integrated circuit fixes the logic level of the bus signal line adjacent to the test signal line in the scan mode that uses the test signal line.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: June 25, 2019
    Assignee: MEI FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Seiji Goto
  • Publication number: 20190171821
    Abstract: A semiconductor integrated circuit generates second boot code by encrypting first boot code, and transmits, based on route information indicating a delivery route of the second boot code, encrypted data including the second boot code to a first destination via a network. A different semiconductor integrated circuit is the first destination, and receives the encrypted data via the network and generates third boot code by decrypting the second boot code.
    Type: Application
    Filed: January 28, 2019
    Publication date: June 6, 2019
    Inventors: Kazuya ASANO, Yuya UENO, Seiji GOTO
  • Patent number: 10303901
    Abstract: The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: May 28, 2019
    Assignee: SOCIONEXT INC.
    Inventors: Seiji Goto, Jun Kamada, Taiji Tamiya
  • Patent number: 10095890
    Abstract: The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: October 9, 2018
    Assignee: SOCIONEXT INC.
    Inventors: Seiji Goto, Jun Kamada, Taiji Tamiya
  • Publication number: 20180281809
    Abstract: A vehicle drive assistance system is provided, which includes a general driver model learning engine configured to build a general driver model to be applied for a plurality of vehicle drivers based on driving data of the plurality of drivers, and an individual driver model learning engine configured to build an individual driver model particular to a specific vehicle driver based on the driving data of the specific driver received from a specific vehicle of the specific driver. The individual driver model learning engine includes a first synchronization engine configured to provide, to the general driver model learning engine, the driving data obtained by executing a first data conversion processing on the driving data of the specific driver.
    Type: Application
    Filed: February 23, 2018
    Publication date: October 4, 2018
    Inventors: Takahiro Tochioka, Osamu Michihira, Naoyuki Hikida, Seiji Goto, Hideki Okano