Abstract: A dielectric structure including a metal foil, a dielectric layer and a conductor layer provided in this order, wherein the metal foil has a thickness of from 10 to 40 ?m, the dielectric layer has a thickness of from 0.3 to 5 ?m, and the conductor layer has a thickness of from 0.3 to 10 ?m. The dielectric structure has plural vias which are separated from each other, and which penetrate through both of the dielectric layer and the conductor layer. The vias of the dielectric layer have different diameters which are in a range of from 100 to 300 ?m, a diameter of each of the vias of the conductor layer is larger than a diameter of a corresponding via of the dielectric layer by 5 to 50 ?m, and a minimum via pitch is from 100 to 350 ?m.

Abstract: A method for manufacturing a ceramic capacitor embedded in a wiring substrate, the ceramic capacitor including a capacitor body which has a pair of capacitor main surfaces and a plurality of capacitor side surfaces also has a structure in which a plurality of internal electrodes are alternately layered through a ceramic dielectric layer, the method has (a) laminating ceramic-made green sheets and combining the green sheets into one, to form a multi-device-forming multilayer unit in which a plurality of product areas, each of which becomes the ceramic capacitor, are arranged in longitudinal and lateral directions along a plane direction, (b) forming a groove portion to form a chamfer portion at a boundary portion between at least one of the capacitor main surfaces and the plurality of capacitor side surfaces, (c) sintering the multi-device-forming multilayer unit, and (d) dividing the product areas into each product area along the groove portion.

Abstract: A ceramic capacitor includes a capacitor body and a metal layer arranged on an outer surface of the capacitor body. The outer surface includes: a first capacitor major surface; a second capacitor major surface opposite to the first capacitor major surface in a thickness direction of the capacitor body; and a capacitor lateral surface between the first and second capacitor major surfaces. The capacitor body includes a first layer section and a second layer section. The first layer section includes a plurality of ceramic dielectric layers and a plurality of internal electrodes, wherein the ceramic dielectric layers and the internal electrodes are layered alternately. The second layer section is exposed at the first capacitor major surface, and includes a corner portion at a boundary between the first capacitor major surface and the capacitor lateral surface. The metal layer covers the corner portion of the second layer section.

Abstract: A ceramic capacitor includes a capacitor body and a metal layer arranged on an outer surface of the capacitor body. The outer surface includes: a first capacitor major surface; a second capacitor major surface opposite to the first capacitor major surface in a thickness direction of the capacitor body; and a capacitor lateral surface between the first and second capacitor major surfaces. The capacitor body includes a first layer section and a second layer section. The first layer section includes a plurality of ceramic dielectric layers and a plurality of internal electrodes, wherein the ceramic dielectric layers and the internal electrodes are layered alternately. The second layer section is exposed at the first capacitor major surface, and includes a corner portion at a boundary between the first capacitor major surface and the capacitor lateral surface. The metal layer covers the corner portion of the second layer section.

Abstract: A method for manufacturing a ceramic capacitor embedded in a wiring substrate, the ceramic capacitor including a capacitor body which has a pair of capacitor main surfaces and a plurality of capacitor side surfaces also has a structure in which a plurality of internal electrodes are alternately layered through a ceramic dielectric layer, the method has (a) laminating ceramic-made green sheets and combining the green sheets into one, to form a multi-device-forming multilayer unit in which a plurality of product areas, each of which becomes the ceramic capacitor, are arranged in longitudinal and lateral directions along a plane direction, (b) forming a groove portion to form a chamfer portion at a boundary portion between at least one of the capacitor main surfaces and the plurality of capacitor side surfaces, (c) sintering the multi-device-forming multilayer unit, and (d) dividing the product areas into each product area along the groove portion.

Abstract: A dielectric structure including a metal foil, a dielectric layer and a conductor layer provided in this order, wherein the metal foil has a thickness of from 10 to 40 ?m, the dielectric layer has a thickness of from 0.3 to 5 ?m, and the conductor layer has a thickness of from 0.3 to 10 ?m. The dielectric structure has plural vias which are separated from each other, and which penetrate through both of the dielectric layer and the conductor layer. The vias of the dielectric layer have different diameters which are in a range of from 100 to 300 ?m, a diameter of each of the vias of the conductor layer is larger than a diameter of a corresponding via of the dielectric layer by 5 to 50 ?m, and a minimum via pitch is from 100 to 350 ?m.

Abstract: A dielectric structure including a metal foil, a dielectric layer and a conductor layer provided in this order, wherein the metal foil has a thickness of from 10 to 40 ?m, the dielectric layer has a thickness of from 0.3 to 5 ?m, and the conductor layer has a thickness of from 0.3 to 10 ?m. The dielectric structure has plural vias which are separated from each other, and which penetrate through both of the dielectric layer and the conductor layer. The vias of the dielectric layer have different diameters which are in a range of from 100 to 300 ?m, a diameter of each of the vias of the conductor layer is larger than a diameter of a corresponding via of the dielectric layer by 5 to 50 ?m, and a minimum via pitch is from 100 to 350 ?m.

Abstract: A first ceramic substrate includes a substrate (2) and a glaze layer (3), wherein the glaze layer has a surface having an Ra of 0.02 ?m or less and a Ry of 0.25 ?m or less. A second ceramic substrate is formed by subjecting a glass layer (24) formed on a surface of a substrate (2) to heating-and-pressurizing treatment, thereby forming a glaze layer (3) on the substrate (2), and planarization-polishing the surface of the glaze layer. A third ceramic substrate includes a substrate (2), a glaze layer (3) containing substantially no pores formed on the substrate (2) and the surface thereof being planarization-polished, and a wiring pattern (21), wherein at least one first end of the wiring pattern is exposed to the glaze layer (3) surface of the substrate (1), and at least one second end is exposed to another surface of the substrate (1).

Abstract: A ceramic substrate for a thin film electronic component, a production method thereof, and a thin film electronic component using the ceramic substrate A first substrate (1) includes a dense glass-ceramic mixed layer (33) containing glass in its surface portion. A second substrate is prepared such that a glass layer (32) formed on a surface of a substrate base portion (2) is subjected to a heat-pressure treatment so as to form or rather partly change the glass portion (32) into a dense glass-ceramic mixed layer (33) in which glass is dispersed into a surface portion of the substrate base portion (2). A surface of the dense glass-ceramic mixed layer (33) is then subjected to grinding or rather polishing to flatten and expose a surface of the dense glass-ceramic mixed layer (32). A third substrate includes a substrate base portion (2) having a dense glass-ceramic mixed layer (33) containing glass on a surface portion in one face side, and a wiring pattern (21) formed inside the substrate base portion (2).

Abstract: A dielectric structure comprising: a metal foil; a dielectric layer; and a conductor layer provided in this order, wherein the metal foil has a thickness of from 10 to 40 ?m, the dielectric layer has a thickness of from 0.3 to 5 ?m, and the conductor layer has a thickness of from 0.3 to 10 ?m, the dielectric structure has plural vias which are separated from each other, and which penetrate through both of the dielectric layer and the conductor layer, and the vias of the dielectric layer have different diameters which are in a range of from 100 to 300 ?m, a diameter of each of the vias of the conductor layer is larger than a diameter of a corresponding via of the dielectric layer by 5 to 50 ?m, and a minimum via pitch is from 100 to 350 ?m.

Abstract: A first ceramic substrate includes a substrate (2) and a glaze layer (3), wherein the glaze layer has a surface having an Ra of 0.02 ?m or less and a Ry of 0.25 ?m or less. A second ceramic substrate is formed by subjecting a glass layer (24) formed on a surface of a substrate (2) to heating-and-pressurizing treatment, thereby forming a glaze layer (3) on the substrate (2), and planarization-polishing the surface of the glaze layer. A third ceramic substrate includes a substrate (2), a glaze layer (3) containing substantially no pores formed on the substrate (2) and the surface thereof being planarization-polished, and a wiring pattern (21), wherein at least one first end of the wiring pattern is exposed to the glaze layer (3) surface of the substrate (1), and at least one second end is exposed to another surface of the substrate (1).

Abstract: A ceramic substrate for a thin film electronic component, a production method thereof, and a thin film electronic component using the ceramic substrate A first substrate (1) includes a dense glass-ceramic mixed layer (33) containing glass in its surface portion. A second substrate is prepared such that a glass layer (32) formed on a surface of a substrate base portion (2) is subjected to a heat-pressure treatment so as to form or rather partly change the glass portion (32) into a dense glass-ceramic mixed layer (33) in which glass is dispersed into a surface portion of the substrate base portion (2). A surface of the dense glass-ceramic mixed layer (33) is then subjected to grinding or rather polishing to flatten and expose a surface of the dense glass-ceramic mixed layer (32). A third substrate includes a substrate base portion (2) having a dense glass-ceramic mixed layer (33) containing glass on a surface portion in one face side, and a wiring pattern (21) formed inside the substrate base portion (2).