Abstract: There is provided a test emulator for emulating a test apparatus including a plurality of test modules for supplying test signal to devices under test respectively, including: a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on different cycles, a control emulation section for emulating a control apparatus for controlling the test of the devices under test, a synchronous emulation section for generating test signal generating timings, at which each of the plurality of test module emulation sections is to generate the test signal in simulation corresponding to cycle time of the test module emulation section, based on instructions from the control emulation section, a timing alignment section for aligning the plurality of test signal generating timings generated by the synchronous emulation section in order of time, and outputting them one by one, and a schedule section for causing the test module emulation section corresponding to one of

Abstract: There is provided a test emulator for emulating a test apparatus including a plurality of test modules for supplying test signal to devices under test respectively, including: a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on different cycles, a control emulation section for emulating a control apparatus for controlling the test of the devices under test, a synchronous emulation section for generating test signal generating timings, at which each of the plurality of test module emulation sections is to generate the test signal in simulation corresponding to cycle time of the test module emulation section, based on instructions from the control emulation section, a timing alignment section for aligning the plurality of test signal generating timings generated by the synchronous emulation section in order of time, and outputting them one by one, and a schedule section for causing the test module emulation section corresponding to one of

Abstract: A test apparatus according to the present invention includes: a plurality of test modules, connected to either of the plurality of devices under test, for supplying a test signal to the connected device under test; a plurality of control apparatuses for controlling the plurality of test modules, and for testing the plurality of devices under test in parallel; and a connection switching section for switching topology of the plurality of control apparatuses and the plurality of test modules so that the plurality of control apparatuses connect with the plurality of devices under test respectively.

Abstract: A test apparatus 10 according to the present invention includes: a plurality of test modules 150, connected to either of the plurality of devices under test 100, for supplying a test signal to the connected device under test 100; a plurality of control apparatuses 130 for controlling the plurality of test modules 150, and for testing the plurality of devices under test 100 in parallel; and a connection setting section 140 for switching topology of the plurality of control apparatuses 130 and the plurality of test modules 150 so that the plurality of control apparatuses 10 connect with the plurality of devices under test 100 respectively.

Abstract: There is provided a test emulator for emulating a test apparatus including a plurality of test modules for supplying test signal to devices under test respectively, including: a plurality of test module emulation sections for emulating the plurality of test modules generating the test signal based on different cycles, a control emulation section for emulating a control apparatus for controlling the test of the devices under test, a synchronous emulation section for generating test signal generating timings, at which each of the plurality of test module emulation sections is to generate the test signal in simulation corresponding to cycle time of the test module emulation section, based on instructions from the control emulation section, a timing alignment section for aligning the plurality of test signal generating timings generated by the synchronous emulation section in order of time, and outputting them one by one, and a schedule section for causing the test module emulation section corresponding to one of

Abstract: A test apparatus 10 according to the present invention includes: a plurality of test modules 150, connected to either of the plurality of devices under test 100, for supplying a test signal to the connected device under test 100; a plurality of control apparatuses 130 for controlling the plurality of test modules 150, and for testing the plurality of devices under test 100 in parallel; and a connection setting section 140 for switching topology of the plurality of control apparatuses 130 and the plurality of test modules 150 so that the plurality of control apparatuses 10 connect with the plurality of devices under test 100 respectively.

Abstract: A test apparatus 10 according to the present invention includes: a plurality of test modules 150, connected to either of the plurality of devices under test 100, for supplying a test signal to the connected device under test 100; a plurality of control apparatuses 130 for controlling the plurality of test modules 150, and for testing the plurality of devices under test 100 in parallel; and a connection switching section 140 for switching topology of the plurality of control apparatuses 130 and the plurality of test modules 150 so that the plurality of control apparatuses 10 connect with the plurality of devices under test 100 respectively.