Patents by Inventor Seiji Ohhashi

Seiji Ohhashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9780233
    Abstract: A solar cell module, a solar cell module assembly, and a solar photovoltaic power generation system capable of reducing power loss are provided. A light-concentrating panel configured to collect light which is incident from the outside and a plurality of solar cell elements installed on the light-concentrating panel and configured to receive light which is collected by the light-concentrating panel are provided. Each of the plurality of solar cell elements is provided with a positive terminal and a negative terminal. The plurality of solar cell elements include a first solar cell element and a second solar cell element which are connected to each other in series via connection wiring and a third solar cell element which is not connected to the first solar cell element and the second solar cell element in series. The first solar cell element and the second solar cell element configure a first current path, and the third solar cell element configures a second current path.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 3, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiji Ohhashi, Hideki Uchida, Yasuyuki Umenaka
  • Patent number: 9236023
    Abstract: A liquid crystal display device (1) includes a plurality of pixels disposed in a matrix form. The liquid crystal display device (1) is driven such that, after a common data voltage is applied to liquid crystal layers of sub pixels disposed in each of the pixels, the transmittance of the liquid crystal layer of a sub pixel which is positioned closest to a boundary between a retarder plate (RR) and a retarder plate (RL) will be decreased. The maximum value of the transmittance of the liquid crystal layers of the sub pixels in a first display mode is smaller than that in a second display mode.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: January 12, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shohei Katsuta, Tsuyoshi Kamada, Seiji Ohhashi
  • Patent number: 9138819
    Abstract: Flutes defining inside diameter finishing edges are formed in middle portions of relief parts arranged in three linear arrays which are located between a plurality of linear arrays of protruding parts in a chamfered end section, about an axis 0, and the inside diameter finishing edges are formed along one of opposite open-end edges of each flute which is located on an upstream side of the flute as seen in a tap rotating direction A, and are offset by a predetermined angle ? in the tap rotating direction A with respect to the protruding parts in the chamfered end section. Accordingly, all of the plurality of linear arrays of protruding parts in the chamfered end section can be used to form the internal thread by plastic deformation of an inner circumferential surface of a hole to be tapped.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: September 22, 2015
    Assignee: OSG CORPORATION
    Inventors: Seiji Ohhashi, Katsuya Matsumoto, Yousuke Suzuki
  • Patent number: 9129545
    Abstract: An LCD device (1) includes a liquid crystal display panel (2) and a liquid crystal driving section (4) for driving the liquid crystal display panel (2) from a region with a lower temperature to a region with a higher temperature in in-screen temperature distribution of the liquid crystal display panel (2) in operation. This configuration allows a scan direction (6) in which the liquid crystal display panel (2) is driven to correspond to temperature distribution direction (8) from a portion with a lower temperature to a portion with a higher temperature. As a result, image quality of images to be displayed by the general-purpose liquid crystal display panel (2) is improved.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: September 8, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuya Ide, Tsuyoshi Kamada, Seiji Ohhashi, Shohei Katsuta
  • Publication number: 20150221798
    Abstract: Provided is a solar cell module capable of increasing module output and a photovoltaic apparatus. A light-guiding body which has a light incidence surface and a light-emitting surface having an area smaller than that of the light incidence surface and converts exterior light incident from the light incidence surface into fluorescent light by a phosphor to emit from the light-emitting surface and N (N is an integer of 4 or more) solar cells of a same type which receive the fluorescent light emitted from the light-emitting surface of the light-guiding body are included, the N solar cells are connected in parallel in a plurality of pieces to thereby form L (L is an integer of 2 or more) parallel-connection blocks each of which has the plurality of solar cells mutually connected in parallel, and the L parallel-connection blocks are mutually serially connected.
    Type: Application
    Filed: September 18, 2013
    Publication date: August 6, 2015
    Inventors: Seiji Ohhashi, Hideki Uchida, Yasuyuki Umenaka
  • Publication number: 20150206987
    Abstract: A solar cell module, a solar cell module assembly, and a solar photovoltaic power generation system capable of reducing power loss are provided. A light-concentrating panel configured to collect light which is incident from the outside and a plurality of solar cell elements installed on the light-concentrating panel and configured to receive light which is collected by the light-concentrating panel are provided. Each of the plurality of solar cell elements is provided with a positive terminal and a negative terminal. The plurality of solar cell elements include a first solar cell element and a second solar cell element which are connected to each other in series via connection wiring and a third solar cell element which is not connected to the first solar cell element and the second solar cell element in series. The first solar cell element and the second solar cell element configure a first current path, and the third solar cell element configures a second current path.
    Type: Application
    Filed: August 5, 2013
    Publication date: July 23, 2015
    Inventors: Seiji Ohhashi, Hideki Uchida, Yasuyuki Umenaka
  • Publication number: 20150162474
    Abstract: A solar cell module includes a light collector, a solar cell element, and a frame. The light collector includes a main surface and an end surface, allows the external light to be incident from the main surface and allows the light propagating through the inside to be emitted from the end surface. The solar cell element is provided so as to face the end surface and receives the light emitted from the end surface to perform photoelectric conversion. The frame holds a peripheral edge portion of the light collector. The light collector includes a through hole which is provided in the inside in relation to the frame when seen from the main surface side and penetrates the light collector in a thickness direction or a notched s portion which is provided in the inside in relation to the frame when seen from the main surface side and extends from the main surface to a rear surface in the peripheral edge portion.
    Type: Application
    Filed: May 31, 2013
    Publication date: June 11, 2015
    Inventors: Hideki Uchida, Hideomi Yui, Seiji Ohhashi, Tsuyoshi Maeda, Osamu Kawasaki, Shohei Katsuta
  • Patent number: 9013388
    Abstract: A liquid crystal display device (1) includes a liquid crystal panel having a plurality of pixels disposed in a matrix form, and a patterned retarder having retarder plates (RR) and retarder plates (RL) formed at positions corresponding to odd-numbered rows and even-numbered rows, respectively, of the liquid crystal panel. Among sub pixels disposed in the pixels positioned in the n-th row, a sub pixel electrode of a boundary-proximity sub pixel, which is positioned closest to a boundary between the associated retarder plate (RR) and the associated retarder plate (RL), is connected to an auxiliary bus line via a transistor having a gate electrode connected to a gate bus line in the (n?1)-th or prior row. In the second display mode, gate signals are sequentially supplied to the gate bus lines in order from the first to the N-th rows, and, in the first display mode, gate signals are sequentially supplied to the gate bus lines in order from the N-th to the first rows.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: April 21, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shohei Katsuta, Tsuyoshi Kamada, Seiji Ohhashi
  • Patent number: 8982024
    Abstract: A liquid crystal display device includes: a first substrate, on which a reference potential trunk line that supplies a reference potential to a plurality of sub-pixels and a switching element of each of the plurality of sub-pixels, are disposed; and a second substrate, on which a display signal line that supplies a display signal, is disposed. A liquid crystal capacitance of each of the plurality of sub-pixels is formed between the first substrate and the second substrate. Pixels composed of the plurality of sub-pixels that correspond to a plurality of luminance regions are arranged in a matrix. In case that a prescribed half-tone is displayed in between pixels that are adjacent in the row direction, the plurality of sub-pixels that correspond to the same luminance region are arranged adjacently in the row direction.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 17, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tsuyoshi Kamada, Tetsuya Ide, Seiji Ohhashi, Shohei Katsuta
  • Patent number: 8878832
    Abstract: Provided is a pixel circuit which includes a plurality of subpixel circuits and which makes it possible to suppress overshooting of electric potentials of the subpixel circuits to a small level. A pixel circuit (PIX1) includes a first subpixel circuit (PIXA) and a second subpixel circuit (PIXB). The first subpixel circuit (PIXA) includes a first display element (ClcA), a first node (nA), a first external connection terminal (P1), and a first switching element (T1). The second subpixel circuit (PIXB) includes a second display element (ClcB), a second node (nB), a second external connection terminal (P2), a third external connection terminal (P3), a second switching element (T2), and a third switching element (T3). The first node (nA) and the second node (nB) are connected to each other via a first capacitor (C2).
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: November 4, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiji Ohhashi, Tsuyoshi Kamada, Tetsuya Ide, Shohei Katsuta
  • Patent number: 8674914
    Abstract: Switching TFTs are controlled to a conducting state and a switching TFT to a non-conducting state, to provide a potential according to a threshold voltage to a gate terminal of a driving TFT. Then, in at least one embodiment, with the TFT maintaining the conducting state, a potential of a data line Sj is changed from a reference potential Vpc to a data potential Vdata to place the TFT in a conducting state. At this time, a current Ia flows and thus the gate terminal potential of the TFT rises. The higher the mobility of the TFT, the larger the amount of change in gate terminal potential and the smaller the current flowing through an organic EL element upon light emission. By this, a current that is not affected by variations in the threshold voltage of the TFT nor by variations in the mobility of the TFT flows through the organic EL element. Thus, in a current-driven type display device, variations in both the threshold voltage and mobility of a drive element are compensated for.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: March 18, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Seiji Ohhashi
  • Publication number: 20140050541
    Abstract: Providing an end mill for reducing the use of the cutting fluid to prevent the environmental pollution. Because the end mill 1 includes the openings 5a which open along spiral grooves 4, and the openings 5a communicate with the aperture on the rear end surface of the shank 2 via the intake path 5, the chips generated in the cutting are aspirated forcibly from the openings 5a when air intake is performed via the intake path 5, and the aspirated chips can be discharged from the aperture on the rear end surface of the shank 2. As a result, because the use of cutting fluid for discharging the chips can be reduced (or unnecessary) in comparison with conventional products, environmental pollution can be prevented.
    Type: Application
    Filed: August 14, 2013
    Publication date: February 20, 2014
    Applicant: OSG CORPORATION
    Inventors: Hiroto Sugano, Seiji Ohhashi
  • Patent number: 8648776
    Abstract: A display device has a pixel circuit (100) including: a drive element (110) provided on a path connecting a first wiring line (Vp) to a second wiring line (Vcom), having a control terminal, a first terminal, and a second terminal, and controlling a current flowing through the path; an electro-optic element (130) provided in series with the drive element (110) on the path, being connected to the first terminal of the drive element (110), and emitting light at a luminance according to the current flowing through the path; a first switching element (111) provided between the first terminal of the drive element (110) and a data line (Sj); a second switching element (112) provided between the control terminal and the second terminal of the drive element (110); a third switching element (113) provided between the second terminal of the drive element (110) and the first wiring line (Vp); and a capacitor (121) provided between the control terminal of the drive element (110) and a third wiring line (Ui).
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: February 11, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Seiji Ohhashi
  • Patent number: 8605029
    Abstract: A display device is implemented that can suppress degradation in display quality caused by crosstalk, without causing an increase in frame size or an increase in power consumption. In an embodiment, each bistable circuit includes an output terminal that outputs a state signal; a thin film transistor having a drain terminal to which a high-level potential is provided, and a source terminal to which the output terminal is connected; a thin film transistor having a source terminal connected to a region netA connected to a gate terminal of the thin film transistor, and a gate terminal to which a clock is provided; a thin film transistor for increasing the potential of a region netZ connected to a drain terminal of the thin film transistor; and thin film transistors for decreasing the potentials of the netA, the netZ, and the output terminal, respectively.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: December 10, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Seiji Ohhashi
  • Publication number: 20130181985
    Abstract: A liquid crystal display device (1) includes a plurality of pixels disposed in a matrix form. The liquid crystal display device (1) is driven such that, after a common data voltage is applied to liquid crystal layers of sub pixels disposed in each of the pixels, the transmittance of the liquid crystal layer of a sub pixel which is positioned closest to a boundary between a retarder plate (RR) and a retarder plate (RL) will be decreased. The maximum value of the transmittance of the liquid crystal layers of the sub pixels in a first display mode is smaller than that in a second display mode.
    Type: Application
    Filed: September 22, 2011
    Publication date: July 18, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shohei Katsuta, Tsuyoshi Kamada, Seiji Ohhashi
  • Publication number: 20130176198
    Abstract: A liquid crystal display device (1) includes a liquid crystal panel having a plurality of pixels disposed in a matrix form, and a patterned retarder having retarder plates (RR) and retarder plates (RL) formed at positions corresponding to odd-numbered rows and even-numbered rows, respectively, of the liquid crystal panel. Among sub pixels disposed in the pixels positioned in the n-th row, a sub pixel electrode of a boundary-proximity sub pixel, which is positioned closest to a boundary between the associated retarder plate (RR) and the associated retarder plate (RL), is connected to an auxiliary bus line via a transistor having a gate electrode connected to a gate bus line in the (n?1)-th or prior row. In the second display mode, gate signals are sequentially supplied to the gate bus lines in order from the first to the N-th rows, and, in the first display mode, gate signals are sequentially supplied to the gate bus lines in order from the N-th to the first rows.
    Type: Application
    Filed: September 15, 2011
    Publication date: July 11, 2013
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shohei Katsuta, Tsuyoshi Kamada, Seiji Ohhashi
  • Patent number: 8430608
    Abstract: A drill is capable of forcibly aspirating and discharging chips to prevent environmental contamination as well as to simplify cleaning the chips. The drill has an intake hole and an opening formed therein so that the aspiration takes place through the intake hole and the chips generated in the cutting process can forcibly be aspirated from the opening. Because the chips can be discharged without using cutting fluid, the drill is useful for preventing environmental contamination. Moreover, as the chips are forcibly aspirated from the opening and discharged through the intake hole, the chips are not scattered around a workpiece under the cutting process and cleaning the chips can become simple and easy.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: April 30, 2013
    Assignee: OSG Corporation
    Inventors: Hiroto Sugano, Seiji Ohhashi
  • Publication number: 20130027374
    Abstract: In a pixel circuit 100, a switching TFT 114, a driving TFT 110, and an organic EL element 130 are provided between a power supply wiring line Vp and a common cathode Vcom and a capacitor 121 and a switching TFT 111 are provided between a gate terminal of the driving TFT 110 and a data line Sj. A switching TFT 112 is provided between a connection point A between the capacitor 121 and the switching TFT 111 and a power supply wiring line Vr, a switching TFT 113 is provided between the gate and drain terminals of the driving TFT 110, and a capacitor 122 is provided between the gate terminal of the driving TFT 110 and the power supply wiring line Vr. Thus, a display device is provided that can freely set a period during which variations in the threshold voltage of a drive element are compensated for, and performs high-quality display by holding a control terminal potential of the drive element during light emission from an electro-optical element.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 31, 2013
    Inventors: Seiji Ohhashi, Takahiro Senda, Toshihiro Ohba
  • Publication number: 20130001546
    Abstract: A display device includes: a plurality of stripe-shaped data electrodes that are formed on a first substrate and that extend in the column direction; a plurality of scanning lines and a plurality of reference signal lines that are formed on a second substrate and that extend in the row direction; a plurality of pixel electrodes that are formed on the second substrate and that are disposed in a matrix arrangement; a plurality of switching elements that are formed on the second substrate and in which on/off is controlled by the plurality of scanning lines, and that are disposed between the plurality of reference signal lines and the plurality of pixel electrodes; and an oxide semiconductor layer that is disposed between a source electrode and a drain electrode. The switching elements are formed so as to be disposed in the vicinity of a gate electrode on the oxide semiconductor layer, with an insulating layer interposed therebetween.
    Type: Application
    Filed: March 18, 2011
    Publication date: January 3, 2013
    Inventors: Tsuyoshi Kamada, Shigeru Aomori, Tetsuya Ide, Seiji Ohhashi, Shohei Katsuta
  • Publication number: 20130002704
    Abstract: A liquid crystal display device includes: a first substrate, on which a reference potential trunk line that supplies a reference potential to a plurality of sub-pixels and a switching element of each of the plurality of sub-pixels, are disposed; and a second substrate, on which a display signal line that supplies a display signal, is disposed. A liquid crystal capacitance of each of the plurality of sub-pixels is formed between the first substrate and the second substrate. Pixels composed of the plurality of sub-pixels that correspond to a plurality of luminance regions are arranged in a matrix. In case that a prescribed half-tone is displayed in between pixels that are adjacent in the row direction, the plurality of sub-pixels that correspond to the same luminance region are arranged adjacently in the row direction.
    Type: Application
    Filed: March 25, 2011
    Publication date: January 3, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tsuyoshi Kamada, Tetsuya Ide, Seiji Ohhashi, Shohei Katsuta