Patents by Inventor Seiji Sawada

Seiji Sawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11529993
    Abstract: To provide a motor controller and an electric power steering apparatus which can suppress torque fluctuation resulting from low detection resolution of angle, with simple calculation, even in condition where the rotational speed of motor is low. A motor controller estimates an angle error correlation value correlated with the angle detection error based on the current command value when a change frequency of the angle detection value is lower than a cutoff frequency of feedback control system which controls a rotation state; corrects the current command value or the angle detection value based on the estimation value of angle error correlation value; and changes the estimation value of angle error correlation value so that the absolute value of angle detection error increases with respect to increase in the current command value, and the absolute value of angle detection error decreases with respect to decrease in the current command value.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: December 20, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenta Tanaka, Isao Kezobo, Akira Furukawa, Seiji Sawada
  • Publication number: 20220398512
    Abstract: Provided are a server and system which allow a plurality of people involved in work to share information about an object requiring attention in a work area. A work environment image, which indicates an extension mode of a target object in a real space in a target object image region R that is a part of a captured image obtained through an imaging device (e.g., an imaging device 612) of a first client (e.g., a worker terminal 60) and target object related information, is outputted to an output interface (e.g., a remote output interface 220) of a second client (e.g., a remote operation device 20).
    Type: Application
    Filed: August 12, 2020
    Publication date: December 15, 2022
    Inventors: Yusuke SAWADA, Hitoshi SASAKI, Seiji SAIKI, Yoichiro YAMAZAKI
  • Publication number: 20220391811
    Abstract: Provided are a server and a system which enable a worker of a work machine to intuitively recognize work contents and the like to be performed using the work machine in each of a plurality of work locations. In response to a first designated operation through a remote input interface 210 of a remote operation device 20, a remote output interface 220 of the remote operation device 20 outputs a work environment image showing positions of designated work locations Q1 and Q2, and information about at least one of a designated work period and a designated work content. The designated work location, the designated work period and the designated work content are included in designated work information that is work information fitting a designated position depending on the first designated operation among a plurality of pieces of work information registered in a database 102.
    Type: Application
    Filed: August 12, 2020
    Publication date: December 8, 2022
    Inventors: Yusuke SAWADA, Hitoshi SASAKI, Seiji SAIKI, Yoichiro YAMAZAKI
  • Publication number: 20220389683
    Abstract: Provided are a server and a system which enable one operator driving or operating a work machine to intuitively recognize advice or instruction from another operator. A route guidance request from a first work machine 40 cooperating a first client (first remote operation device 20) is accepted. A guided route R extending between a first designated position P1 and a second designated position P2 may be designated through an input interface 210 of a second client (second remote operation device 20). Then, route guidance information depending on the guided route R is outputted to an output interface 220 of the first client.
    Type: Application
    Filed: August 12, 2020
    Publication date: December 8, 2022
    Inventors: Yusuke SAWADA, Hitoshi SASAKI, Seiji SAIKI, Yoichiro YAMAZAKI
  • Patent number: 11520061
    Abstract: A radiation imaging device according to one embodiment includes a radiation detection panel having a first surface on which a detection region is formed, and a second surface on a side opposite to the first surface, a base substrate having a support surface configured to face the second surface and configured to support the radiation detection panel, and a flexible circuit substrate connected to the radiation detection panel, wherein an end portion of the base substrate corresponding to a portion to which the flexible circuit substrate is connected is located further inward than an end portion of the radiation detection panel when seen in a first direction orthogonal to the support surface, and the base substrate has a protruding portion which protrudes further outward than the radiation detection panel at a position at which the base substrate does not overlap the flexible circuit substrate when seen in the first direction.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: December 6, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryuji Kyushima, Kazuki Fujita, Junichi Sawada, Takao Aritake, Minoru Ichikawa, Haruyoshi Okada, Seiji Fukamizu, Shuhei Namba
  • Patent number: 11505221
    Abstract: A floating caliper brake device for a railroad vehicle includes: a support pin that is supported by a cylindrical portion of a support frame in such a manner as to be slidable in a direction X; a caliper; a first and second brake shoe; a pressurizing device that moves the first brake shoe back and forth; an elastic member that is expandable and contractible in the direction X; a stopper member that is immovable relatively to the cylindrical portion in the direction X; and a moving member that is frictionally engaged with the support pin so as to be slidable in the direction X.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: November 22, 2022
    Assignees: NIPPON STEEL CORPORATION, CENTRAL JAPAN RAILWAY COMPANY
    Inventors: Kousuke Sakaguchi, Kazuaki Fujita, Masanori Sawada, Hironori Yokota, Tomohiro Otsuka, Jun Asano, Masashi Sekiya, Seiji Kanamori
  • Patent number: 11421929
    Abstract: A food management system that manages food items in a refrigerator includes: a pressure-sensitive sensor that acquires information including shapes, weights, and positions of the food items; a comparator that performs comparison of the information acquired at different times; and an identifier that identifies at least one of (i) fluctuations in the number of food items or (ii) presence or absence of the food items.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: August 23, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Seiji Yamahira, Yuta Moriura, Akihiro Odagawa, Kazuya Niki, Shinobu Masuda, Yui Sawada, Keiji Noine
  • Publication number: 20220224172
    Abstract: In a redundancy resolver device, winding groups of different systems are arranged at different positions in a circumferential direction of a stator core. The winding groups of each system include: an excitation winding group consisting of a plurality of excitation windings, and being connected to corresponding one of excitation circuits; a first output winding group; and a second output winding group. Each of the teeth has corresponding one of the excitation windings wound therearound. When two of the excitation windings belonging to different systems and being arranged side by side is the circumferential direction of the stator core are defined as a first end excitation winding and a second end excitation winding, respectively, the first end excitation winding and the second end excitation winding are applied with excitation signals to generate magnetic fluxes in the same direction of radial directions of the stator core.
    Type: Application
    Filed: May 24, 2019
    Publication date: July 14, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroko IKEDA, Tatsuya MORI, Kenta MOTOYOSHI, Kodai OKAZAKI, Kenji IKEDA, Yosuke SUGINO, Seiji SAWADA, Kenta KUBO, Toshihiro MATSUNAGA
  • Publication number: 20220166356
    Abstract: To provide a controller for rotary electric machine which can suppress the increase in the switching frequency by the voltage for estimation while reducing the estimation delay of the magnetic pole position (the rotational angle). A controller for rotary electric machine turns on and off switching devices which the inverter has and applies voltage to the winding, based on a comparison result between the voltage command and the carrier wave; generates the voltage command for estimation of a preliminarily set one period on a stationary coordinate system fixed to the winding; generates the carrier wave of the same one period as the one period of the voltage command for estimation; extracts the frequency component of the one period of the voltage command for estimation from the current detection value; and estimates a rotational angle based on the frequency component.
    Type: Application
    Filed: June 4, 2019
    Publication date: May 26, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Jun KITAGAWA, Tatsuya MORI, Isao KEZOBO, Seiji SAWADA, Kenta KUBO
  • Publication number: 20220103102
    Abstract: To provide a controller for motor which can reduce a torque ripple up to high frequency, without amplifying unnecessary noise and vibration. A controller for motor estimates an interlinkage flux based on the applied voltage and the detection value of current; estimates an output torque based on the detection value of current and the estimation value of interlinkage flux; extracts a pulsation component from the estimation value of output torque; calculates a voltage command correction value based on the extraction value of pulsation component; calculates a voltage command after superimposing by superimposing the voltage command correction value on the voltage command basic value; and applies voltage to winding based on the voltage command after superimposing.
    Type: Application
    Filed: May 30, 2019
    Publication date: March 31, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Isao KEZOBO, Masahiko ORII, Tatsuya MORI, Seiji SAWADA, Kenta KUBO
  • Publication number: 20220018646
    Abstract: Even using the redundant system resolver in which the magnetic interference between systems occurs, to provide an angle detection apparatus which can reduces the influence of the magnetic interference and can calculate the rotational angle with good accuracy, without performing synchronous control between systems in real time. An angle detection apparatus is provided with a resolver which has the first system windings and the second system windings in which magnetic interference occurs between systems; a first system removal processing unit that performs a second cycle component removal processing which removes component of the second cycle of the second system, to detection values of the first system winding output signals; and a first system angle calculation unit that calculates a first angle of rotor, based on the detection values of the first system winding output signals after the second cycle component removal processing.
    Type: Application
    Filed: January 25, 2019
    Publication date: January 20, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuya MORI, Toshihiro MATSUNAGA, Hiroko IKEDA, Seiji SAWADA, Kenta KUBO, Kenji IKEDA
  • Patent number: 10892018
    Abstract: A semiconductor memory device includes a memory array including a plurality of memory blocks, an address allocation information storage unit which stores address allocation information, a block selection circuit which selects one memory block which corresponds to an input address which is input on the basis of the address allocation information and a refresh control circuit which controls a refreshing operation. One of the memory blocks is allotted to a surplus memory block. The refresh control circuit transfers data which is stored in one memory block which is a refreshing object to the surplus memory block and thereafter allocates address information of the memory block which was the refreshing object to the surplus memory block to which the data is transferred and newly allots the memory block which was the refreshing object to the surplus memory block.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: January 12, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Seiji Sawada
  • Publication number: 20200255067
    Abstract: To provide a motor controller and an electric power steering apparatus which can suppress torque fluctuation resulting from low detection resolution of angle, with simple calculation, even in condition where the rotational speed of motor is low. A motor controller estimates an angle error correlation value correlated with the angle detection error based on the current command value when a change frequency of the angle detection value is lower than a cutoff frequency of feedback control system which controls a rotation state; corrects the current command value or the angle detection value based on the estimation value of angle error correlation value; and changes the estimation value of angle error correlation value so that the absolute value of angle detection error increases with respect to increase in the current command value, and the absolute value of angle detection error decreases with respect to decrease in the current command value.
    Type: Application
    Filed: November 7, 2017
    Publication date: August 13, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenta TANAKA, Isao KEZOBO, Akira FURUKAWA, Seiji SAWADA
  • Patent number: 10339335
    Abstract: A semiconductor device includes a first storage unit including twin cells which are electrically rewritable and complementarily store 1-bit data based on a difference in a threshold voltage, a second storage unit including a memory cell which is electrically rewritable, data stored in the memory cell being erased when data in the twin cells is erased, at least one scrambler subjecting first data to a scramble processing by using scramble data to generate second data, a first write circuit which writes the second data into the twin cells in the first storage unit, a second write circuit which writes the scramble data into the memory cell in the second storage unit, and at least one descrambler subjecting the second data read from the first storage unit to a descramble processing by using the scramble data read from the second storage unit.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: July 2, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Seiji Sawada
  • Publication number: 20190172541
    Abstract: A semiconductor memory device includes a memory array including a plurality of memory blocks, an address allocation information storage unit which stores address allocation information, a block selection circuit which selects one memory block which corresponds to an input address which is input on the basis of the address allocation information and a refresh control circuit which controls a refreshing operation. One of the memory blocks is allotted to a surplus memory block. The refresh control circuit transfers data which is stored in one memory block which is a refreshing object to the surplus memory block and thereafter allocates address information of the memory block which was the refreshing object to the surplus memory block to which the data is transferred and newly allots the memory block which was the refreshing object to the surplus memory block.
    Type: Application
    Filed: October 4, 2018
    Publication date: June 6, 2019
    Inventor: Seiji SAWADA
  • Publication number: 20190043586
    Abstract: To prolong the lifetime of a semiconductor memory device without performing complicated control. A semiconductor memory device according to one embodiment is equipped with a bank A and a bank B operable complementarily to each other, and a bank selection circuit which selects either one of the banks A and B. The bank selection circuit alternately switches the bank to be selected, each time an erase command to instruct erasing of data in either one of the banks A and B is issued.
    Type: Application
    Filed: July 5, 2018
    Publication date: February 7, 2019
    Inventor: Seiji SAWADA
  • Publication number: 20180357441
    Abstract: A semiconductor device includes a first storage unit including twin cells which are electrically rewritable and complementarily store 1-bit data based on a difference in a threshold voltage, a second storage unit including a memory cell which is electrically rewritable, data stored in the memory cell being erased when data in the twin cells is erased, at least one scrambler subjecting first data to a scramble processing by using scramble data to generate second data, a first write circuit which writes the second data into the twin cells in the first storage unit, a second write circuit which writes the scramble data into the memory cell in the second storage unit, and at least one descrambler subjecting the second data read from the first storage unit to a descramble processing by using the scramble data read from the second storage unit.
    Type: Application
    Filed: August 20, 2018
    Publication date: December 13, 2018
    Inventor: Seiji SAWADA
  • Patent number: 10073982
    Abstract: A scramble unit subjects data to be written into twin cells in a first storage unit to scramble processing with the use of scramble data. A write unit writes write data subjected to the scramble processing into the twin cells in the first storage unit. A write unit writes scramble data into a memory cell in a second storage unit. A descramble unit subjects the data read from the first storage unit to descramble processing with the use of scramble data read from the second storage unit.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: September 11, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Seiji Sawada
  • Publication number: 20180144807
    Abstract: The present disclosure provides a semiconductor device that can reduce the power consumption. The semiconductor device includes memory cells arranged in a matrix form, and a verify circuit that performs a verify operation to verify whether or not data is written to a memory cell. The verify circuit performs the verify operation when write data is in a first state, and dose not perform the verify operation when the write data is in a second state.
    Type: Application
    Filed: November 21, 2017
    Publication date: May 24, 2018
    Applicant: Renesas Electronics Corporation
    Inventor: Seiji SAWADA
  • Publication number: 20160203328
    Abstract: A scramble unit (501) subjects data to be written into twin cells (505) in a first storage unit (502) to scramble processing with the use of scramble data. A write unit (509) writes write data subjected to the scramble processing into the twin cells (505) in the first storage unit (502). A write unit (511) writes scramble data into a memory cell (510) in a second storage unit (503). A descramble unit (504) subjects the data read from the first storage unit (502) to descramble processing with the use of scramble data read from the second storage unit (503).
    Type: Application
    Filed: August 15, 2013
    Publication date: July 14, 2016
    Inventor: Seiji SAWADA