Abstract: The semiconductor device of the present invention includes: a semiconductor layer of a first conductivity type; source and drain regions of a second conductivity type, which are formed within the semiconductor layer; a channel region provided between the source and drain regions; and a gate electrode formed over the channel region. The device further includes: a buried region of the first conductivity type, at least part of the buried region being included in the drain region; and a heavily doped region of the second conductivity type. The heavily doped region is provided at least between a surface of the semiconductor layer and the buried region. The concentration of a dopant of the second conductivity type in the heavily doped region is higher than that of the dopant of the second conductivity type in the drain region.

Abstract: The semiconductor device of the present invention includes: a semiconductor layer of a first conductivity type; source and drain regions of a second conductivity type, which are formed within the semiconductor layer; a channel region provided between the source and drain regions; and a gate electrode formed over the channel region. The device further includes: a buried region of the first conductivity type, at least part of the buried region being included in the drain region; and a heavily doped region of the second conductivity type. The heavily doped region is provided at least between a surface of the semiconductor layer and the buried region. The concentration of a dopant of the second conductivity type in the heavily doped region is higher than that of the dopant of the second conductivity type in the drain region.

Abstract: There is provided a method for fabricating a semiconductor device comprising a semiconductor layer of a first conductivity type, a source region of a second conductivity type formed within the semiconductor layer, a drain region of the second conductivity type formed within the semiconductor layer, a channel region provided between the source and drain regions, a gate electrode formed over the channel region, and a buried region of the first conductivity type having at least a part included in the drain region. The method for fabricating the semiconductor device comprises the steps of doping the semiconductor layer with a dopant of the second conductivity type for the drain region and doping the semiconductor layer with a dopant of the first conductivity type for the buried region.

Abstract: An N.sup.- - region is formed by diffusion on a P- semiconductor substrate, and a P- region is formed in a surface portion of the N.sup.- - region. A P.sup.+ - region is formed in an outer peripheral portion of the N.sup.- - region, to suppress expansion of a depletion layer of the P- semiconductor substrate when a high voltage is applied. A gate oxide film is formed on the semiconductor substrate, and a gate electrode of polycrystalline silicon is formed on the gate oxide film, particularly on a channel region which is formed by the semiconductor substrate and the P.sup.+ - region, which is as a whole the same as a structure of a lateral N-channel MOSFET. Circuit elements are formed within the N.sup.- - region, and a high voltage is applied. Circuit portions are isolated as the gate electrode and a source region are grounded. This reduces the number of steps for manufacturing a high-insulation IC, increases a breakdown voltage, and integrates the circuit denser.