Abstract: A technique of performing anonymization without impairing usefulness of data. An anonymization apparatus includes an overlapping exclusion part configured to generate a partial table of M×L including L records of a table to be anonymized which have sets of values of p master attributes different from each other, from the table to be anonymized of M×N, where M is the number of attributes, N is the number of records, p is the number of master attributes, and L is the number of sets of values of p master attributes which are different from each other, an anonymization part configured to generate an anonymized partial table of M×L from the partial table by anonymizing the p master attributes in the partial table, and an overlapping restoration part configured to generate an anonymized table of M×N.

Abstract: A cutoff control apparatus controls a cutoff unit in a vehicle-mounted system which includes: a power storage unit; a power line between the power storage unit and a load; and the cutoff unit that switches between a cutoff state that cuts off supplying of power on the power line from the power storage unit side to the load side and a canceled state where the cutoff state is canceled. In the vehicle-mounted system, the cutoff unit includes a first cutoff unit and a second cutoff unit, and the second cutoff unit enters the cutoff state when a first overcurrent state has occurred on the power line with the first cutoff unit in the canceled state. The cutoff control apparatus includes a control apparatus that instructs the first cutoff unit to switch to the cutoff state when the power line is in a second overcurrent state.

Abstract: A sheet processing apparatus includes a conveying portion, a conveying path, a discharge port, a stacking portion, a manual setting portion, a binding device which binds a sheet bundle formed by the stacking portion and a sheet bundle set at the manual setting portion by a staple, a first regulating portion which regulates a position of the sheet bundle at a rear side of the apparatus in a width direction, and a second regulating portion which regulates a position of the sheet bundle in the conveying direction. The binding device is formed to be movable back and forth to a front side and the rear side of the apparatus. When a staple is replenished to the binding device, the binding device is positioned at the third position so that a cartridge of the staple is loaded into the binding device from the front side of the apparatus.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor, the method includes forming a first photodetector and a second photodetector in a substrate. An isolation structure is formed in the substrate between the first photodetector and the second photodetector. A readout transistor is formed over the isolation structure. The readout transistor includes a first sidewall directly over the first photodetector and a second sidewall directly over the second photodetector. A height of the readout transistor from the first sidewall to the second sidewall is constant.

Abstract: Provided are a mutant cis-prenyltransferase (CPT) family protein and a method for producing a polyisoprenoid, which enable the production of a high molecular weight polyisoprenoid. Included is a mutant cis-prenyltransferase (CPT) family protein obtained by mutating the amino acid sequence of a C-terminal region of a cis-prenyltransferase (CPT) family protein not found on rubber particles to be identical or similar to the amino acid sequence of a C-terminal region of a cis-prenyltransferase (CPT) family protein found on rubber particles.

Abstract: Provided are a mutant cis-prenyltransferase (CPT) family protein and a method for producing a polyisoprenoid, which enable the production of a high molecular weight polyisoprenoid. Included is a mutant cis-prenyltransferase (CET) family protein obtained by mutating the amino acid sequence of a N-terminal region of a cis-prenyltransferase (CPT) family protein not found on rubber particles to be identical or similar to the amino acid sequence of a N-terminal region of a cis-prenyltransferase (CPT) family protein found on rubber particles, and mutating the amino acid sequence of a C-terminal region of the cis-prenyltransferase (CPT) family protein not found on rubber particles to be identical or similar to the amino acid sequence of a C-terminal region of a cis-prenyltransferase (CPT) family protein found on rubber particles.

Abstract: Provided are a mutant cis-prenyltransferase (CPT) family protein and a method for producing a polyisoprenoid, which enable the production of a high molecular weight polyisoprenoid. Included is a mutant cis-prenyltransferase (CPT) family protein obtained by mutating the amino acid sequence of a N-terminal region of a cis-prenyltransferase (CPT) family protein not found on rubber particles to be identical or similar to the amino acid sequence of a N-terminal region of a cis-prenyltransferase (CPT) family protein found on rubber particles.

Abstract: The present disclosure provides a method for producing a polyisoprenoid, which makes it possible to synthesize in vitro a polyisoprenoid having an unprecedented structure, such as a 100% cis-polyisoprenoid or a polyisoprenoid containing an allylic diphosphate derivative as an initiating terminal. The present disclosure relates to a method for producing a polyisoprenoid in vitro, which employs a gene coding for a neryl diphosphate synthase and rubber particles bound to a protein encoded by the gene, or a method for producing a polyisoprenoid, which includes introducing into a plant a vector in which a gene coding for a neryl diphosphate synthase is linked to a promoter having a promoter activity that drives laticifer-specific gene expression to express a protein encoded by the gene specifically in laticifers.

Abstract: In some embodiments, the present disclosure relates to method for forming an image sensor integrated chip. The method includes forming a first photodetector region in a substrate and forming a second photodetector region in the substrate. A floating diffusion node is formed in the substrate between the first photodetector region and the second photodetector region. A pick-up well contact region is formed in the substrate. A first line intersects the floating diffusion node and the pick-up well contact region. One or more transistor gates are formed on the substrate. A second line that is perpendicular to the first line intersects the pick-up well contact region and the one or more transistor gates.

Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.

Abstract: A power conversion apparatus includes a switching circuit including multiple switching elements, and a control unit configured to control and switch the multiple switching elements included in the switching circuit at a predetermined switching frequency with a direct current voltage applied to an input terminal of the switching circuit. The switching circuit is configured to convert the direct current voltage applied to the input terminal and to output a converted electric current. The switching frequency is set such that the switching frequency and a main frequency component of a ripple occurring in the electric current are out of a frequency range used for communication with a vehicle-mounted receiver.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor, the method includes forming a first photodetector and a second photodetector in a substrate. An isolation structure is formed in the substrate between the first photodetector and the second photodetector. A readout transistor is formed over the isolation structure. The readout transistor includes a first sidewall directly over the first photodetector and a second sidewall directly over the second photodetector. A height of the readout transistor from the first sidewall to the second sidewall is constant.

Abstract: A voltage supply system and a power source that, in a voltage supply system in which a plurality of power sources (e.g., DC-DC converters) are connected in parallel, enable each power source to be set at a desired load ratio. The power source is used in a voltage supply system including a power source configured to output a voltage in a constant voltage mode on the basis of a first target voltage, and is connected in parallel to the constant voltage power source, the power source including a voltage generation unit configured to output a voltage switchably between a constant voltage mode based on a second target voltage greater than the first target voltage and a constant current mode based on a current limit value.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first semiconductor substrate having a photodetector and a floating diffusion node. A transfer gate is disposed over the first semiconductor substrate, where the transfer gate is at least partially disposed between opposite sides of the photodetector. A second semiconductor substrate is vertically spaced from the first semiconductor substrate, where the second semiconductor substrate comprises a first surface and a second surface opposite the first surface. A readout transistor is disposed on the second semiconductor substrate, where the second surface is disposed between the transfer gate and a gate of the readout transistor. A first conductive contact is electrically coupled to the transfer gate and extending vertically from the transfer gate through both the first surface and the second surface.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first semiconductor substrate having a photodetector and a floating diffusion node. A transfer gate is disposed over the first semiconductor substrate, where the transfer gate is at least partially disposed between opposite sides of the photodetector. A second semiconductor substrate is vertically spaced from the first semiconductor substrate, where the second semiconductor substrate comprises a first surface and a second surface opposite the first surface. A readout transistor is disposed on the second semiconductor substrate, where the second surface is disposed between the transfer gate and a gate of the readout transistor. A first conductive contact is electrically coupled to the transfer gate and extending vertically from the transfer gate through both the first surface and the second surface.

Abstract: The present disclosure relates to a CMOS image sensor. The image sensor comprises a pixel region comprising a photodiode disposed within a substrate. A deep trench isolation (DTI) ring encloses the photodiode from top view and extends from a back-side to a first position within the substrate from cross-sectional view. A pair of shallow trench isolation (STI) structures is respectively disposed at an inner periphery and an outer periphery sandwiching the DTI ring from top view and extends from a front-side to a second position within the substrate from cross-sectional view. A pixel device is disposed at the front-side of the substrate directly overlying the DTI ring. The pixel device comprises a gate electrode disposed over the substrate and a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI ring.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a plurality of photodetectors within a substrate. A first plurality of semiconductor devices disposed over a first side of the substrate. A second plurality of semiconductor devices disposed over the first side of the substrate. The first and second plurality of semiconductor devices are disposed on opposing sides of the plurality of photodetectors such that the plurality of photodetectors are spaced laterally between the first and second plurality of semiconductor devices. The first and second plurality of semiconductor devices are laterally offset from the plurality of photodetectors.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including a first photodetector and a second photodetector each disposed within a semiconductor substrate. An isolation structure extends from a front-side surface of the semiconductor substrate to a back-side surface of the semiconductor substrate. The front-side surface is opposite the back-side surface and the isolation structure is laterally between the first and second photodetectors. A readout transistor is disposed on the front-side surface of the semiconductor substrate. A first side of the readout transistor overlies the first photodetector and a second side of the readout transistor overlies the second photodetector. The first side is opposite the second side and the readout transistor continuously extends over the isolation structure.

Abstract: The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, the DTI structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain regions disposed within the substrate and reaching on a top surface of the DTI structure. A second trench isolation structure is disposed from the front-side at an inner peripheral of the first trench isolation structure. The first trench isolation structure has a top surfaces locating at a position of the substrate vertically exceeding bottom surfaces of the second trench isolation structure.