Abstract: A method of producing miso according to this invention comprises the steps of preparing a raw solution as a flavor raw material of the miso, converting the raw solution into a flavor solution by means of a predetermined fermentation treatment, preparing a digested material as a major raw material of the miso, and mixing the flavor solution with the digested material, to thereby produce the miso.

Abstract: Method for measuring power supply current, e.g., standby current of a random access memory in which, before starting measurement of the power supply current, data is read-out from memory cell of the random access memory and opposite data is written in the memory cell so that the random access memory enters into an unstabilized state. By use of this method, the measurement of the maximum power supply current can be conducted precisely.

Abstract: The static random access memory reduces the access time thereof and reduces the power consumption thereof during its time of operation, and employs a circuit arrangement such that not only is the logical amplitude of each bit line diminished during a read-out operation, but the bit line is precharged after a write operation is accomplished during a write operation.

Abstract: A power steering apparatus is disclosed wherein improved steering characteristics are provided over a wide range of driving conditions. The system includes an oil pump for supplying pressurized oil from an oil tank to either a left or right cylinder chamber in a power cylinder and a flow control valve which returns part of the pressurized oil discharged from the oil pump to the tank. In accordance with the invention, at least one small orifice is provided communicating a pressurized oil feed line directed to one of the chambers in the power cylinder with a return line directed to the oil tank from the other one of the chambers in the power cylinder at the downstream side of the flow control valve.

Abstract: A CMOS integrated circuit includes a P-channel type MOS transistor which is formed on an N-type silicon substrate, an N-channel type MOS transistor which is formed on a P well formed in the substrate, and parasitic bipolar transistors which are electrically connected to each other to form a kind of thyristor structure. A power supply voltage is applied to a source electrode of the P-channel type MOS transistor through a part of the substrate which presents a resistance. The resistance is electrically connected to the parasitic bipolar transistor of the thyristor structure to thereby prevent the occurrence of a latch-up phenomenon in which a large current continuously flows through the parasitic bipolar transistors and may destroy the CMOS integrated circuit. Because of the prevention of the latch-up phenomenon, the CMOS integrated circuit is always maintained in good condition.