Abstract: An adder circuit of bit slice type comprises a first circuit for receiving first and second binary input signals A and B of a certain bit length (M+1) and producing parallel output signals, a second circuit means for producing carry signals, and a third circuit for producing the result of the addition of said first and second binary input signals.The adder circuit is characterized in that the first circuit comprises a plurality of arithmetic and logical circuits each receiving two pairs of the input bit signals (A.sub.2n+1, A.sub.2n, B.sub.2n+1, B.sub.2n) which correspond to the contents of the two adjacent bits of said input binary signals. The arithmetic and logical circuit of the first circuit outputs signals G.sub.2n+1, P.sub.2n+1, X.sub.2n+1, X.sub.2n and Y.sub.2n of the following logical formula.G.sub.2n+1 =A.sub.2n+1 B.sub.2n+1 +(A.sub.2n+1 .sym.B.sub.2n+1).multidot.A.sub.2n B.sub.2nP.sub.2n+1 =(A.sub.2n+1 .sym.B.sub.2n+1).multidot.(A.sub.2n .sym.B.sub.2n)X.sub.2n+1 =A.sub.2n+1 .sym.B.sub.2n+1X.sub.