Patents by Inventor Seiko Inoue

Seiko Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140361290
    Abstract: In a pixel including a selection transistor, a driver transistor, and a light-emitting element, as the driver transistor, a transistor is used in which a channel is formed in an oxide semiconductor film and its channel length is 0.5 ?m or greater and 4.5 ?m or less. The driver transistor includes a first gate electrode over an oxide semiconductor film and a second gate electrode below the oxide semiconductor film. The first gate electrode and the second gate electrode are electrically connected to each other and overlap with the oxide semiconductor film. Furthermore, in the selection transistor of a pixel, which does not need to have field-effect mobility as high as that of the driver transistor, a channel length is made longer than at least the channel length of the driver transistor.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Seiko INOUE, Shinpei MATSUDA, Daisuke MATSUBAYASHI, Masahiko HAYAKAWA
  • Publication number: 20140339543
    Abstract: A semiconductor device includes a dual-gate transistor including an oxide semiconductor film between a first gate electrode and a second gate electrode, a gate insulating film between the oxide semiconductor film and the second gate electrode, and a pair of electrodes in contact with the oxide semiconductor film. The semiconductor device further includes an insulating film over the gate insulating film, and a conductive film over the insulating film and connected to one of the pair of electrodes. The insulating film includes an opening in at least a region overlapping with the oxide semiconductor film in which the second gate electrode is provided in contact with the gate insulating film. The second gate electrode is formed using the same material as the conductive film connected to the one of the pair of electrodes.
    Type: Application
    Filed: May 13, 2014
    Publication date: November 20, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Seiko INOUE, Daisuke MATSUBAYASHI
  • Publication number: 20140340363
    Abstract: A novel transmissive imaging panel, a novel imaging panel with a display function, or a novel imaging device is provided. The imaging panel that includes a plurality of windows or pixels arranged in matrix, a photoelectric conversion element extending between the plurality of windows or pixels, and a sensor circuit supplied with a signal from the photoelectric conversion element has been devised.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 20, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki IKEDA, Seiko INOUE, Hiroyuki MIYAKE, Kouhei TOYOTAKA, Takashi NAKAGAWA
  • Patent number: 8884302
    Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Inoue, Hiroyuki Miyake, Kouhei Toyotaka
  • Publication number: 20140240631
    Abstract: Transistors each include a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A driver circuit portion includes first to third wirings formed in the same step as the gate electrode, fourth to sixth wirings formed in the same step as the source electrode and the drain electrode, a seventh wiring formed in the same step as a pixel electrode, a first region where the second wiring intersects with the fifth wiring, and a second region where the third wiring intersects with the sixth wiring. The first wiring is connected to the fourth wiring through the seventh wiring. A distance between the wirings in the second region is longer than that in the first region.
    Type: Application
    Filed: February 20, 2014
    Publication date: August 28, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki SHISHIDO, Hiroyuki MIYAKE, Seiko INOUE, Kouhei TOYOTAKA, Koji KUSUNOKI
  • Publication number: 20140104262
    Abstract: In a video voltage comparator circuit, an average of first video voltages applied to pixel electrodes of pixels in the second-half rows in a k-th frame period (k is a natural number) is compared with an average of second video voltages applied to pixel electrodes of pixels in the first-half rows in a (k+1)th frame period for each row. In an overdrive voltage switching circuit, when a difference obtained from the comparison in the video voltage comparator circuit is greater than or equal to a threshold value, the overdrive voltage in the (k+1)th frame period is switched to a first overdrive voltage, and when the difference obtained from the comparison in the video voltage comparator circuit is less than the threshold value, the overdrive voltage in the (k+1)th frame period is switched to a second overdrive voltage lower than the first overdrive voltage.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 17, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroyuki MIYAKE, Hideaki Shishido, Seiko Inoue
  • Publication number: 20130308372
    Abstract: A storage device in which held voltage is prevented from decreasing due to feedthrough in writing data to the storage device at high voltage is provided. The storage device includes a write circuit, a bit line, a word line, a transistor, and a capacitor. A gate of the transistor is electrically connected to the word line. One of a source and a drain of the transistor is electrically connected to the bit line. The other of the source and the drain of the transistor is electrically connected to one terminal of the capacitor. The other terminal of the capacitor is electrically connected to a ground. The write circuit includes an element holding write voltage and a circuit gradually decreasing voltage from the element holding write voltage. The write voltage is output from the write circuit to the word line.
    Type: Application
    Filed: May 13, 2013
    Publication date: November 21, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Seiko Inoue
  • Patent number: 8405092
    Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 26, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Inoue, Hiroyuki Miyake, Kouhei Toyotaka
  • Publication number: 20130021316
    Abstract: A light-emitting device in which variation in luminance of pixels is suppressed. A light-emitting device includes at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and a light-emitting element. The first wiring and a first electrode of the capacitor are electrically connected to each other through the first switch. A second electrode of the capacitor is connected to a first terminal of the transistor. The second wiring and a gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitor and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and an anode of the light-emitting element are electrically connected to each other through the fourth switch.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Seiko INOUE, Hiroyuki MIYAKE
  • Publication number: 20130021239
    Abstract: A display device includes a display panel including a plurality of pixels, a shutter panel including a driver circuit, a liquid crystal, and light-transmitting electrodes provided in a striped manner, and a positional data detector configured to detect a positional data of a viewer. The shutter panel is provided over a display surface side of the display panel, a width of one of the light-transmitting electrodes in the shutter panel is smaller than that of one of the plurality of pixels, and the driver circuit in the shutter panel is configured to selectively output signals for forming a parallax barrier to the light-transmitting electrodes. The parallax barrier is capable of changing its shape in accordance with the detected positional data.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Hiroyuki MIYAKE, Hideaki SHISHIDO, Seiko INOUE, Kouhei TOYOTAKA, Koji KUSUNOKI, Hikaru HARADA, Makoto KANEYASU
  • Publication number: 20120287025
    Abstract: In a circuit in FIG. 1, pluses are input to a first gate signal line and a second gate signal line in accordance with a timing chart in FIG. 3, so that transistors in the circuit are turned on/off. As a result, a potential difference between a third node and a second node does not depend on the threshold voltage of a fourth transistor and is determined only by a potential of a data line and a potential of a second wiring. Therefore, an intended current can flow in a display element.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 15, 2012
    Applicant: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Seiko Inoue, Hiroyuki Miyake, Jun Koyama
  • Publication number: 20120127384
    Abstract: A display device capable of high-quality stereoscopic display without decreasing resolution is provided. A pixel portion including a plurality of pixels arranged in matrix is divided into plural regions, lighting of backlight units each emitting light of different hues is controlled in each region, and the backlight units of the plural regions are turned off simultaneously at a regular interval so as to display black. The right-eye image and the left-eye image are alternately displayed with black display interposed therebetween, and light incident on the right eye of a viewer is blocked when a left-eye image is displayed, and light incident on the left eye of the viewer is blocked when a right-eye image is displayed. An image signal is written into a pixel in a black display period during which the backlight units are turned off.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 24, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroyuki Miyake, Seiko Inoue
  • Publication number: 20120061666
    Abstract: A semiconductor device including a first gate electrode and a second gate electrode formed apart from each other over an insulating surface, an oxide semiconductor film including a region overlapping with the first gate electrode with a gate insulating film interposed therebetween, a region overlapping with the second gate electrode with the gate insulating film interposed therebetween, and a region overlapping with neither the first gate electrode nor the second gate electrode, and an insulating film covering the gate insulating film, the first gate electrode, the second gate electrode, and the oxide semiconductor film, and being in direct contact with the oxide semiconductor film is provided.
    Type: Application
    Filed: September 9, 2011
    Publication date: March 15, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Seiko INOUE, Hiroyuki MIYAKE, Kouhei TOYOTAKA
  • Patent number: 7351755
    Abstract: In a method of producing an oil-in-water type emulsion containing an internally crosslinked fine resin particle, the fine resin particle is encapsulated in an emulsion particle having an average particle diameter of 0.02 to 0.3 ?m. The method includes a step of undergoing phase transition from a water-in-oil type emulsion (Y) which includes a resin (A) having a cationic group or an anionic group, an acid or a base (B) neutralizing 20 to 150 mole percent of the cationic group or the anionic group in the resin (A), an internally crosslinked fine resin particle (C), having an average particle diameter of 0.01 to 0.2 ?m, dispersed in an oil phase and an aqueous medium (D) to an oil-in-water type emulsion (Z) by adding the aqueous medium (D) further to the water-in-oil type emulsion (Y).
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: April 1, 2008
    Assignee: Nippon Paint Co., Ltd.
    Inventors: Hitoshi Hori, Yasuhiro Hayashi, Seiko Inoue, legal representative, Hisaichi Muramoto, Tsuyoshi Inoue
  • Publication number: 20040214923
    Abstract: In a method of producing an oil-in-water type emulsion containing an internally crosslinked fine resin particle, the fine resin particle is encapsulated in an emulsion particle having an average particle diameter of 0.02 to 0.3 &mgr;m. The method includes a step of undergoing phase transition from a water-in-oil type emulsion (Y) which includes a resin (A) having a cationic group or an anionic group, an acid or a base (B) neutralizing 20 to 150 mole percent of the cationic group or the anionic group in the resin (A), an internally crosslinked fine resin particle (C), having an average particle diameter of 0.01 to 0.2 &mgr;m, dispersed in an oil phase and an aqueous medium (D) to an oil-in-water type emulsion (Z) by adding the aqueous medium (D) further to the water-in-oil type emulsion (Y).
    Type: Application
    Filed: March 25, 2004
    Publication date: October 28, 2004
    Inventors: Hitoshi Hori, Yasuhiro Hayashi, Tsuyoshi Inoue, Hisaichi Muramoto, Seiko Inoue