Abstract: A semiconductor device may include an insulating layer, a pad, a circuit, at least one first wiring, at least one second wiring, at least one third wiring, and a pad contact. The pad may be disposed on the insulating layer. The circuit may be disposed in the insulating layer. The circuit may be positioned below the pad. The first wiring may be disposed between the pad and the circuit. The second wiring may be disposed between the pad and the first wiring. The third wiring may be disposed between the pad and the second wiring. The pad contact may be configured to directly connect the pad to the circuit.

Abstract: A semiconductor device may include an insulating layer, a pad, a circuit, at least one first wiring, at least one second wiring, at least one third wiring, and a pad contact. The pad may be disposed on the insulating layer. The circuit may be disposed in the insulating layer. The circuit may be positioned below the pad. The first wiring may be disposed between the pad and the circuit. The second wiring may be disposed between the pad and the first wiring. The third wiring may be disposed between the pad and the second wiring. The pad contact may be configured to directly connect the pad to the circuit.

Abstract: A semiconductor device may include an insulating layer, a pad, a circuit, at least one first wiring, at least-one second wiring, at least one third wiring, and a pad contact. The pad may be disposed on the insulating layer. The circuit may be disposed in the insulating layer. The circuit may be positioned below the pad. The first wiring may be disposed between the pad and the circuit. The second wiring may be disposed between the pad and the first wiring. The third wiring may be disposed between the pad and the second wiring. The pad contact may be configured to directly connect the pad to the circuit.

Abstract: A semiconductor device may include an insulating layer, a pad, a circuit, at least one first wiring, at least-one second wiring, at least one third wiring, and a pad contact. The pad may be disposed on the insulating layer. The circuit may be disposed in the insulating layer. The circuit may be positioned below the pad. The first wiring may be disposed between the pad and the circuit. The second wiring may be disposed between the pad and the first wiring. The third wiring may be disposed between the pad and the second wiring. The pad contact may be configured to directly connect the pad to the circuit.

Abstract: A semiconductor device includes an internal circuit and a cell-type power decoupling capacitor. The cell-type power decoupling capacitor is formed on a semiconductor substrate using a stack cell capacitor process. The cell-type power decoupling capacitor stabilizes a supply voltage to provide the stabilized supply voltage to the internal circuit. Accordingly, the semiconductor device including the cell-type power decoupling capacitor may be insensitive to power noise and may occupy a small area on a chip.

Abstract: A semiconductor device includes: a second transistor having a second conductive type formed on a first well region having a first conductive type; a first transistor having a first conductive type formed on a second well region having a second conductive type; a first well guard ring having the first conductive type, the first well guard ring including at least a first portion formed between the first transistor and the second transistor; a second well guard ring having the first conductive type, the second well guard ring including at least a first portion formed between the first transistor and the second transistor; and a first capacitor formed on at least one of the first well region and the second well region, and located between the first portion of the first well guard ring and the first portion of the second well guard ring.

Abstract: A semiconductor device includes: a second transistor having a second conductive type formed on a first well region having a first conductive type; a first transistor having a first conductive type formed on a second well region having a second conductive type; a first well guard ring having the first conductive type, the first well guard ring including at least a first portion formed between the first transistor and the second transistor; a second well guard ring having the first conductive type, the second well guard ring including at least a first portion formed between the first transistor and the second transistor; and a first capacitor formed on at least one of the first well region and the second well region, and located between the first portion of the first well guard ring and the first portion of the second well guard ring.

Abstract: A memory device includes a memory cell array, a column decoder, and a row decoder. The row decoder includes a first word line driver and a second word line driver. The first word line driver is configured to electrically coupled to a first set of antifuse memory cells coupled to a first word line. The second word line driver is configured to electrically coupled to a second set of antifuse memory cells coupled to a second word line. The first set of antifuse memory cells are arranged in first and third rows of the memory cell array, and the second set of antifuse memory cells are arranged in second and fourth rows of the memory cell array. The second row is arranged between the first and third rows.

Abstract: A semiconductor device includes an internal circuit and a cell-type power decoupling capacitor. The cell-type power decoupling capacitor is formed on a semiconductor substrate using a stack cell capacitor process. The cell-type power decoupling capacitor stabilizes a supply voltage to provide the stabilized supply voltage to the internal circuit. Accordingly, the semiconductor device including the cell-type power decoupling capacitor may be insensitive to power noise and may occupy a small area on a chip.

Abstract: A chassis base assembly includes a chassis base in which a plurality of slots are formed, and a reinforcing member coupled to the chassis base to protrude through the slots from a surface of the chassis base to the opposite side thereof. A plasma display device assembly includes a panel assembly having a plurality of discharge electrodes formed thereon and forming an image during discharge, a chassis base supporting the panel assembly and having a plurality of slots formed herein, a drive circuit portion coupled to a rear side of the chassis base, a flexible printed cable having end portions respectively connected to each of ports of the panel assembly and each of ports of the drive circuit portion, and a reinforcing member disposed between the panel assembly and the chassis base and reinforcing the chassis base.

Abstract: At least one mounting member having a guide groove mounted on a side of a chassis base for supporting a plasma display panel, and at least one printed circuit board slidingly mounted along the guide groove. Such mounting of a printed circuit board enables enhancement of production efficiency. By forming a ground electrode on the PCB along a position contacting the guide groove, grounding of the PCB is enhanced and electromagnetic interference thereof is minimized.

Abstract: A plasma display apparatus is provided to reduce noise. The plasma display apparatus includes a plasma display panel, a chassis which is disposed behind the plasma display panel and supports the plasma display panel, a circuit unit which is disposed behind the chassis and drives the plasma display panel, a signal transmitting member which transmits electrical signals generated in the circuit unit to the plasma display panel, and a cover plate which covers a portion of the signal transmitting member. A penetrating hole is formed on the cover plate.

Abstract: A plasma display device includes a chassis base that is substantially rectangular having long sides and short sides. A plasma display panel (PDP) is mounted to a panel attachment face of the chassis base, and at least one plasma display panel drive circuit board is mounted to a circuit attachment face of the chassis base. Long side reinforcing members are mounted on the circuit attachment face of the chassis base along a long side direction thereof, and short side reinforcing members mounted on the circuit attachment face of the chassis base along a short side direction thereof. At least one short side reinforcing member is made of a material having a higher rigidity than a material from which the chassis base is made.

Abstract: A chassis base assembly includes a chassis base in which a plurality of slots are formed, and a reinforcing member coupled to the chassis base to protrude through the slots from a surface of the chassis base to the opposite side thereof. A plasma display device assembly includes a panel assembly having a plurality of discharge electrodes formed thereon and forming an image during discharge, a chassis base supporting the panel assembly and having a plurality of slots formed herein, a drive circuit portion coupled to a rear side of the chassis base, a flexible printed cable having end portions respectively connected to each of ports of the panel assembly and each of ports of the drive circuit portion, and a reinforcing member disposed between the panel assembly and the chassis base and reinforcing the chassis base.

Abstract: At least one mounting member having a guide groove mounted on a side of a chassis base for supporting a plasma display panel, and at least one printed circuit board slidingly mounted along the guide groove. Such mounting of a printed circuit board enables enhancement of production efficiency. By forming a ground electrode on the PCB along a position contacting the guide groove, grounding of the PCB is enhanced and electromagnetic interference thereof is minimized.

Abstract: A support stand for a display device includes a chassis base, a display panel, a connecting member, a stand member, and a shock absorbing member. The display panel is attached to the chassis base, and the connecting member is coupled to the chassis base. The stand member is connected to the connecting member such that the stand member supports the chassis base to which the display panel is attached. The shock absorbing member is disposed between the connecting member and the stand member such that the shock absorbing member absorbs a shock caused by a collision between the connecting member and the stand member.

Abstract: A plasma display device includes a chassis base that is substantially rectangular having long sides and short sides. A plasma display panel (PDP) is mounted to a panel attachment face of the chassis base, and at least one plasma display panel drive circuit board is mounted to a circuit attachment face of the chassis base. Long side reinforcing members are mounted on the circuit attachment face of the chassis base along a long side direction thereof, and short side reinforcing members mounted on the circuit attachment face of the chassis base along a short side direction thereof. At least one short side reinforcing member is made of a material having a higher rigidity than a material from which the chassis base is made.