Patents by Inventor Seisaku Hirai
Seisaku Hirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120092295Abstract: A touch-sensitive coordinate input apparatus includes a plurality of regions (3,4) on a substrate (1), each region being defined by four electrodes (2A, 2B, 2C, 2D; 4A, 4B, 4C, 4D) disposed rectangularly, and also includes a dielectric (6) disposed across the four electrodes in each region (3, 4). A position-detecting mechanism (7,8) obtains position information of a touch operation by calculating changes in capacitance of the four electrodes (2A, 2B, 2C, 2D; 4A, 4B, 4C, 4D) for every region caused by the touch operation to the dielectric (6) within the region (3,4), and a compound-processing mechanism (9) conducts a calculation processing based on the position information in at least two of the plurality of regions (3,4).Type: ApplicationFiled: October 12, 2011Publication date: April 19, 2012Applicant: HOSIDEN CORPORATIONInventor: Seisaku Hirai
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Patent number: 7393763Abstract: There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate. An area in which monocrystalline gallium nitride 410 is grown is locally present on a silicon substrate 100 by forming silicon carbide 200 on the silicon substrate 100 to locally form the monocrystalline gallium nitride 410 on the above-mentioned silicon carbide 200. Silicon nitride 220 is used as a mask in forming the above-mentioned monocrystalline gallium nitride 410.Type: GrantFiled: February 14, 2005Date of Patent: July 1, 2008Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 7128788Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: GrantFiled: March 18, 2004Date of Patent: October 31, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 7084049Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: GrantFiled: January 27, 2003Date of Patent: August 1, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 7077875Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: GrantFiled: February 7, 2005Date of Patent: July 18, 2006Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 6927144Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: GrantFiled: March 12, 2004Date of Patent: August 9, 2005Assignees: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20050148108Abstract: There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate. An area in which monocrystalline gallium nitride 410 is grown is locally present on a silicon substrate 100 by forming silicon carbide 200 on the silicon substrate 100 to locally form the monocrystalline gallium nitride 410 on the above-mentioned silicon carbide 200. Silicon nitride 220 is used as a mask in forming the above-mentioned monocrystalline gallium nitride 410.Type: ApplicationFiled: February 14, 2005Publication date: July 7, 2005Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20050136611Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: ApplicationFiled: February 7, 2005Publication date: June 23, 2005Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20040191966Abstract: Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.Type: ApplicationFiled: March 12, 2004Publication date: September 30, 2004Applicants: OSAKA PREFECTURE,, HOSIDEN CORPORATIONInventors: Katsutoshi IZUMI, Motoi NAKAO, Yoshiaki OHBAYASHI, Keiji MINE, Seisaku HIRAI, Fumihiko JOBE, Tomoyuki TANAKA
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Publication number: 20040173154Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: ApplicationFiled: March 18, 2004Publication date: September 9, 2004Applicants: Osaka Prefecture, Hosiden CorporationInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20040099871Abstract: There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate.Type: ApplicationFiled: November 4, 2003Publication date: May 27, 2004Applicants: OSAKA PREFECTURE, HOSIDEN CORPORATIONInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Publication number: 20030148586Abstract: A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130, of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.Type: ApplicationFiled: January 27, 2003Publication date: August 7, 2003Applicant: OSAKA PREFECTUREInventors: Katsutoshi Izumi, Motoi Nakao, Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai, Fumihiko Jobe, Tomoyuki Tanaka
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Patent number: 6602633Abstract: A crush type pressure detecting device less in occurrence of malfunction, simple in structure, and inexpensive to manufacture is presented. On a crush plate 120 made of ceramics or the like, a conductor path 130 is formed, for example, in linear or U-shape, and electrodes 131 are provided at both ends. Both ends of the crush plate 120 are inserted into a holder 110 made of plastic or printed board so as to support at both sides. An opening 111 is provided in the holder 110 to expose the electrode 131, thereby obtaining a crush type pressure detecting device 100 of the invention. Terminal plates 140 are connected to the electrodes 131 of this detecting device 100, and the terminal plates 140 are used as mounting members, and are disposed in contact with the object to be detected, for example, the outer wall of a housing 210 of a rechargeable battery 200.Type: GrantFiled: September 12, 2000Date of Patent: August 5, 2003Assignee: Hosiden CorporationInventors: Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai
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Patent number: 6472097Abstract: Explosion of rechargeable battery can be prevented in a relatively simple structure, at low cost, and without allowing spouting of electrolyte.Type: GrantFiled: April 25, 2000Date of Patent: October 29, 2002Assignee: Hosiden CorporationInventors: Yoshiaki Ohbayashi, Naoya Takehara, Keiji Mine, Seisaku Hirai
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Patent number: 6393892Abstract: To attain an impact sensor designed compact and to be readily assembled. The impact sensor comprises main part 100 of sensor involving cavity 110, of which bottom surface serves as the fracture part 120; impact force transfer member 130 provided on said fracture part 120; weight 200 being confined in said cavity 110; and seal member 300 to close the cavity 110 with the weight 200 left confined therein, whereby the fracture part 120 is apt to be broken up by the weight 200, when an impact exceeding the predetermined value has been encountered.Type: GrantFiled: June 27, 2000Date of Patent: May 28, 2002Assignee: Hosiden CorporationInventors: Yoshiaki Ohbayashi, Keiji Mine, Seisaku Hirai