Patents by Inventor Seishi Oida
Seishi Oida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9018761Abstract: A semiconductor device of the present invention includes a circuit board having a number of electrode portions on the front side and the underside, an electronic circuit element such as a semiconductor chip bonded to the electrode portions on the front side of the circuit board and composing an electronic circuit; and a plurality of ball electrodes for external connection, the ball electrodes being formed on the electrode portions on the underside of the circuit board. Of the electrode portions on the underside of the circuit board, an electrode portion on the outer periphery is formed larger than an electrode portion on the inner periphery. The plurality of ball electrodes are solder balls heated and melted on the electrode portions on the underside of the board so as to form an alloy on the interfaces, the solder balls containing tin and silver but not containing lead.Type: GrantFiled: January 29, 2008Date of Patent: April 28, 2015Assignee: Panasonic CorporationInventors: Kouji Oomori, Seishi Oida
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Patent number: 8283759Abstract: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.Type: GrantFiled: October 19, 2006Date of Patent: October 9, 2012Assignees: Panasonic Corporation, Shinko Electric Industries Co., Ltd.Inventors: Seishi Oida, Takahiro Nakano, Yoshito Miyahara, Takashi Yoshie, Harunobu Satou, Kouichi Kadosaki, Kazumitsu Seki
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Publication number: 20120001275Abstract: A semiconductor device in which intrusion of the cutting water and cutting wastes in the singulation process can be prevented, and reliability is improved includes: a substrate; at least one semiconductor element having a piezoelectric conversion function and mounted on the main surface of the substrate; a casing fixed to the main surface of the substrate to cover the semiconductor element; a through hole formed in the substrate or the casing; and a predetermined substance filled into the through hole to close the through hole, wherein the predetermined substance has properties such that the predetermined substance wettably spreads by heating to open the through hole.Type: ApplicationFiled: September 9, 2011Publication date: January 5, 2012Applicant: PANASONIC CORPORATIONInventors: Dahe CHI, Seishi OIDA
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Publication number: 20080185721Abstract: A semiconductor device of the present invention includes a circuit board having a number of electrode portions on the front side and the underside, an electronic circuit element such as a semiconductor chip bonded to the electrode portions on the front side of the circuit board and composing an electronic circuit; and a plurality of ball electrodes for external connection, the ball electrodes being formed on the electrode portions on the underside of the circuit board. Of the electrode portions on the underside of the circuit board, an electrode portion on the outer periphery is formed larger than an electrode portion on the inner periphery. The plurality of ball electrodes are solder balls heated and melted on the electrode portions on the underside of the board so as to form an alloy on the interfaces, the solder balls containing tin and silver but not containing lead.Type: ApplicationFiled: January 29, 2008Publication date: August 7, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Kouji Oomori, Seishi Oida
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Publication number: 20070090501Abstract: A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.Type: ApplicationFiled: October 19, 2006Publication date: April 26, 2007Inventors: Seishi Oida, Takahiro Nakano, Yoshito Miyahara, Takashi Yoshie, Harunobu Satou, Kouichi Kadosaki, Kazumitsu Seki
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Patent number: 6917118Abstract: On a surface of an electronic component facing a substrate, a plurality of electrode terminals are provided which are of circular plane shapes. On regions of the main surface of the substrate facing the electrode terminals, a plurality of interconnect electrodes are provided which are of circular plane shapes.Type: GrantFiled: October 21, 2003Date of Patent: July 12, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kouji Omori, Masayuki Yukawa, Toshiyuki Nakazawa, Seishi Oida, Takashi Ogawa, Shigeki Sakaguchi
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Patent number: 6853077Abstract: A semiconductor device includes a semiconductor element having a plurality of element electrodes and a ball electrode electrically connected to at least one element electrode out of the plurality of element electrodes. The ball electrode is made of a Sn—Zn-based lead-free solder including 7 through 9.5 wt % of zinc and the remaining of tin.Type: GrantFiled: October 1, 2002Date of Patent: February 8, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Seishi Oida, Sigeki Sakaguchi, Koji Ohmori, Kenrou Jitumori
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Publication number: 20040089945Abstract: On a surface of an electronic component facing a substrate, a plurality of electrode terminals are provided which are of circular plane shapes. On regions of the main surface of the substrate facing the electrode terminals, a plurality of interconnect electrodes are provided which are of circular plane shapes.Type: ApplicationFiled: October 21, 2003Publication date: May 13, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Kouji Omori, Masayuki Yukawa, Toshiyuki Nakazawa, Seishi Oida, Takashi Ogawa, Shigeki Sakaguchi
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Publication number: 20030089923Abstract: A semiconductor device includes a semiconductor element having a plurality of element electrodes and a ball electrode electrically connected to at least one element electrode out of the plurality of element electrodes. The ball electrode is made of a Sn—Zn-based lead-free solder including 7 through 9.5 wt % of zinc and the remaining of tin.Type: ApplicationFiled: October 1, 2002Publication date: May 15, 2003Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Seishi Oida, Sigeki Sakaguchi, Koji Ohmori, Kenrou Jitumori
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Publication number: 20010045640Abstract: A semiconductor chip (15) is bonded on a die pad (13) of a leadframe, and inner leads (12) are electrically connected to electrode pads of the semiconductor chip (15) with metal fine wires (16). The die pad (13), semiconductor chip (15) and inner leads are molded with a resin encapsulant (17). However, no resin encapsulant (17) exists on the respective back surfaces of the inner leads (12), which protrude downward from the back surface of the resin encapsulant (17) so as to be external electrodes (18). That is to say, since the external electrodes (18) protrude, a standoff height can be secured in advance for the external electrodes (18) in bonding the external electrodes (18) to electrodes of a motherboard. Thus, the external electrodes (18) may be used as external terminals as they are, and no ball electrodes of solder or the like need to be provided for the external electrodes (18). Accordingly, this process is advantageous in terms of the number of manufacturing process steps and the manufacturing costs.Type: ApplicationFiled: July 20, 2001Publication date: November 29, 2001Inventors: Seishi Oida, Yukio Yamaguchi, Nobuhiro Suematsu
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Patent number: 6291274Abstract: A method for manufacturing a semiconductor chip (15) which is bonded on a die pad (13) of a leadframe, and inner leads (12) are electrically connected to electrode pads of the semiconductor chip (15) with metal fine wires (16). The die pad (13), semiconductor chip (15) and inner leads are molded with a resin encapsulant (17). However, no resin encapsulant (17) exists on the respective back surfaces of the inner leads (12), which protrude downward from the back surface of the resin encapsulant (17) so as to be external electrodes (18).Type: GrantFiled: July 21, 1999Date of Patent: September 18, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Seishi Oida, Yukio Yamaguchi, Nobuhiro Suematsu
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Patent number: 6258314Abstract: According to the present invention, a method for manufacturing a resin-molded semiconductor device by interposing a sealing sheet within a molding die for encapsulating a lead frame, on which a semiconductor chip has been bonded, with a molding compound, is provided. In adhering the sealing sheet to the lead frame and encapsulating the lead frame with the molding compound, tension is applied to the sealing sheet.Type: GrantFiled: June 20, 2000Date of Patent: July 10, 2001Assignee: Matsushita Electronics CorporationInventors: Seishi Oida, Yukio Yamaguchi, Nobuhiro Suematsu, Takeshi Morikawa, Yuichiro Yamada
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Patent number: 6126885Abstract: According to the present invention, a method for manufacturing a resin-molded semiconductor device by interposing a sealing sheet within a molding die for encapsulating a lead frame, on which a semiconductor chip has been bonded, with a molding compound, is provided. In adhering the sealing sheet to the lead frame and encapsulating the lead frame with the molding compound, tension is applied to the sealing sheet.Type: GrantFiled: June 26, 1998Date of Patent: October 3, 2000Assignee: Matsushita Electronics CorporationInventors: Seishi Oida, Yukio Yamaguchi, Nobuhiro Suematsu, Takeshi Morikawa, Yuichiro Yamada