Abstract: There is a need to solve a possible system malfunction when a power supply voltage decreases steeply. To solve this problem, a control method is provided for a voltage detection system having an interrupt mode and a reset mode. First and second detection levels are configured. When a power supply voltage is higher than the first detection level, a latch circuit is placed in a first state to enable the interrupt mode. When the power supply voltage becomes lower than or equal to the first detection level, an interrupt signal is generated to change the latch circuit from the first state to a second state and enable the reset mode. A system reset is issued when the power supply voltage becomes lower than or equal to the second detection level in the reset mode.

Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.

Abstract: A microcontroller includes a CPU (Central Processing Unit), a data input unit, and an oscillator that supplies a clock signal in response to operational modes of the microcontroller. The operational modes include a STOP mode, a SNOOZE mode and a RUN mode, in the STOP mode, the oscillator and the CPU are stopped, in the RUN mode, the CPU and the data input unit operate using the clock signal supplied from the oscillator, and in the SNOOZE mode, the oscillator starts and supplies the clock signal to the data input unit when the data input unit receives first data, and the microcontroller switches to the RUN mode after the data input unit receives second data using the clock signal.

Abstract: A voltage detection circuit including a voltage selection circuit that outputs a voltage commensurate with a power supply voltage as a first voltage; a detection voltage selection circuit that selects either an external input voltage inputted from an external terminal or the first voltage according to a first control signal, and outputs it as a comparison voltage; a reference voltage generation circuit that generates a reference voltage; a comparator that compares the reference voltage and the comparison voltage, and outputs the comparison result as a detection signal; a control circuit that generates the first control signal so that the detection voltage selection circuit may output either the first voltage or the external input voltage as the comparison voltage by time division, and when a variation of the first voltage is detected, generates the first control signal so that the detection object selection circuit may output the first voltage as the comparison voltage.

Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.

Abstract: A voltage detection circuit including a voltage selection circuit that outputs a voltage commensurate with a power supply voltage as a first voltage; a detection voltage selection circuit that selects either an external input voltage inputted from an external terminal or the first voltage according to a first control signal, and outputs it as a comparison voltage; a reference voltage generation circuit that generates a reference voltage; a comparator that compares the reference voltage and the comparison voltage, and outputs the comparison result as a detection signal; a control circuit that generates the first control signal so that the detection voltage selection circuit may output either the first voltage or the external input voltage as the comparison voltage by time division, and when a variation of the first voltage is detected, generates the first control signal so that the detection object selection circuit may output the first voltage as the comparison voltage.

Abstract: There is a need to solve a possible system malfunction when a power supply voltage decreases steeply. To solve this problem, a control method is provided for a voltage detection system having an interrupt mode and a reset mode. First and second detection levels are configured. When a power supply voltage is higher than the first detection level, a latch circuit is placed in a first state to enable the interrupt mode. When the power supply voltage becomes lower than or equal to the first detection level, an interrupt signal is generated to change the latch circuit from the first state to a second state and enable the reset mode. A system reset is issued when the power supply voltage becomes lower than or equal to the second detection level in the reset mode.

Abstract: A microcontroller includes a data input unit that receives input data and outputs a start request signal according to the input data upon receiving the input data; an oscillator that starts according to the start request signal, to generate a clock signal; a clock signal supply control unit that outputs the start request signal supplied from the data input unit to the oscillator, and supplies the clock signal supplied from the oscillator generated after the start as a first clock signal and a second clock signal that are operation clock signals of the data input unit; and a CPU that operates the second clock signal as an operation clock, and performs processing according to the input data when the second clock signal is operated.

Abstract: A counter counts pulses of a clock generated by an oscillator. A control register clears the counted value, in response to a reset signal sent from an external circuit. In the case where the counted value exceeds a limit value, an output control circuit outputs a reset signal for instructing to execute the reset process, to the external circuit. This reset signal is provided also to the control register. The control register controls the counter to count the pulses of the clock, in response to the reset signal. Then, abnormal operations occurring in the external circuit during the execution of the reset process can be detected.

Abstract: A counter counts pulses of a clock generated by an oscillator. A control register clears the counted value, in response to a reset signal sent from an external circuit. In the case where the counted value exceed, a limit value, an output control circuit outputs a reset signal for instructing to execute the reset process, to the external circuit. This reset signal is provided also to the control register. The control register controls the counter to count the pulses of the clock, in response to the reset signal. Then, abnormal operations occurring in the external circuit during the execution of the reset process can be detected.