Abstract: A memory, includes memory array disposed in an isolated well of semiconductor material and including a plurality of storage cells, each storage cell being accessible via one of a plurality of bit lines; a set of isolation transistors disposed in the isolated well of semiconductor material, each transistor having one of a source and drain coupled to a respective one of the bit lines of the memory array; and a sense amplifier disposed in semiconductor material outside the isolated well of semiconductor material and being coupled to the other of the source and drain of the respective isolation transistors.