Abstract: A display substrate is provided, including: first sub-pixels, second sub-pixels and third sub-pixels. The first sub-pixels and the third sub-pixels form a first type of rows along the first direction and a first type of columns along the second direction. The second sub-pixels form a second type of rows along the first direction and a second type of columns along the second direction. Within a same one of the first type of rows or a same one of the first type of columns, a first straight line connecting midpoints of a pair of opposite edges of the first sub-pixel and passing through a center of the first sub-pixel is parallel to but does not coincide with a second straight line connecting midpoints of a corresponding pair of opposite edges of the third sub-pixel and passing through a center of the third sub-pixel.

Abstract: First sub-pixels and third sub-pixels are alternated in first and second directions to form first type of rows along the first direction and first type of columns along the second direction, and second sub-pixels form second type of rows along the first direction and second type of columns along the second direction. In at least one first type of row, a connection line between centers of first and third sub-pixels adjacent to each other is not parallel to the first direction, a connection line between centers of first sub-pixels adjacent to each other is parallel to the first direction, and a connection line between centers of third sub-pixels adjacent to each other is parallel to the first direction. In at least one of the second type of rows, a connection line between centers of second sub-pixels adjacent to each other is parallel to the first direction.

Abstract: A mask includes a frame, at least one mask sheet, and a shielding plate. The frame includes a plurality of borders. The borders are connected end to end in sequence to form the frame with a first hollow region. A mask sheet includes a pattern region and non-pattern regions. The pattern region includes at least one evaporation hole. The shielding plate includes a plurality of shielding strips. The plurality of shielding strips are arranged crosswise to form a plurality of second hollow regions. Orthogonal projections of the second hollow regions on a plane perpendicular to a thickness direction of the frame are located within a range of an orthogonal projection of the first hollow region on the plane. An inner edge of an orthogonal projection of the frame on the plane is located within a range of an orthogonal projection of the shielding plate on the plane.

Abstract: A display substrate and a mask plate assembly includes a base substrate, a pixel defining layer, a functional layer, a cathode layer, and a covering layer that are sequentially stacked in a direction away from the base substrate, wherein the size of orthographic projection of the functional layer on the base substrate is jointly determined by the size of a display area and a first minimum distance. The first minimum distance is the minimum distance in a direction from the display area to a non-display area and between the boundary of the display area and the boundary of the functional layer, and is determined by a first shadow width of the functional layer extending from the display area to the non-display area. The first shadow width is the maximum width of a shadow area formed within a preset region when the functional layer is vapor deposited in the preset region.

Abstract: This disclosure discloses a display panel and a display apparatus. The display panel includes: a substrate, wherein the substrate has a display region and a border region surrounding the display region; the border region includes a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate; the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region; an orthographic projection of the first power voltage line on the substrate is within the first dam region; the first planarization layer is at least within the first dam region and the second dam region, and the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and the first planarization layer has a first groove and a second groove.

Abstract: The present disclosure relates to a mask, a mask device and a mask design method. The mask includes: a pattern area, wherein the pattern area includes a plurality of openings, among which adjacent openings are spaced apart by a first rib, and at least one of the plurality of openings has a non-straight side, two first straight sides intersecting with the non-straight side, and a second straight side opposite to the non-straight side and intersecting with the first straight sides; and a second rib located at an edge of the pattern area, wherein the second rib is provided with a cutout for compensating for stretch deformation of the non-straight side, extending lines of the two first straight sides extending toward the second rib along a first direction intersect with the second rib to obtain a first area, and the cutout is located at least within the first area.

Abstract: A display substrate, a detection method, and a display device. The display substrate includes: a substrate, including a display region and a peripheral region surrounding the display region; multiple subpixels, multiple data lines, arranged in the display region; a first control signal line, a second control signal line, a crack detection line, and at least one data detection line, arranged in the peripheral region, and the crack detection line is provided around the display region; multiple display screen detection units, arranged in the peripheral region, configured to transmit, according to a control signal provided by the first control signal line, a detection signal provided by the at least one data detection line to at least one of the multiple data lines; multiple crack detection units, arranged in the peripheral region.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: A method for controlling stretching of a mask includes: obtaining actual position information of at least one opening of the mask; determining an actual offset of each opening according to actual position information of the opening and preset position information of a light-emitting region of a sub-pixel corresponding to the opening; determining whether the actual offset of the opening is less than or equal to a theoretical maximum offset of the opening; and in response to determining that the actual offset of the opening is less than or equal to the theoretical maximum offset of the opening, generating a first end command for ending a process of stretching the mask.

Abstract: The present invention discloses a film type liquid heater and a uniform heating method thereof. End fixation plates are arranged at two ends of a barrel. A heating pipe is arranged in the barrel. Pipe ports run through the two end fixation plates, respectively. Connecting pipes are arranged in the pipe ports. Sealing connection components are arranged at inner ends of the two connecting pipes. A heating film layer is coated outside the heating pipe. Electrode layers are connected left and right sides of the heating film layer, and the electrode layers are connected to an external power supply. An insulating layer is coated outside the heating film layer. A flow splitting column is fixedly connected in the heating pipe. A heating chamber is formed between an inner side of the heating pipe and the flow splitting column. Flow splitting grooves are formed at left and right ends and on the inner side of the flow splitting column.

Abstract: A display substrate, a method for manufacturing the display substrate and a display device are provided. The display substrate includes a display region and a non-display region surrounding the display region. The display substrate further includes: an organic functional layer including a first portion located in the display region and a second portion located in the non-display region. The second portion is provided with at least one isolation groove, and is partitioned into at least two separate sub-portions by the at least one isolation groove, and the at least two sub-portions are arranged sequentially along a first direction from the display region to a boundary of the display substrate.

Abstract: A first planarization layer, an anode lap joint later, a pixel defining layer are between the first dam and the display area; the anode lap joint layer includes a main body portion and sharp angle portions; the sharp angle portion at least includes a first side edge close to the display area; the pixel defining layer wraps a border of the anode lap joint layer and has a first groove extending from one to the other sharp angle portion. An edge of the first groove adjacent to the first side edge of the sharp angle portion is a second side edge; and an orthographic projection of the second side edge on a base substrate is in an orthographic projection of the third groove on the base substrate.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wiring are respectively disposed on two sides of the light-emitting layer below the light-emitting layer, the signal wiring is between the first and second wiring, the projections of the first and second wiring on the base substrate respectively overlap projections of two edges of the light-emitting layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: The present disclosure relates to a display substrate and a display device. The display substrate includes: a base substrate including a display area and a non-display area includes a fan-out area; a signal line layer including a plurality of signal lines located in the fan-out area; a first metal layer including a first power line located in the non-display area; a first electrode layer including a first electrode portion; and an organic insulating layer having a groove located in the non-display area. On the base substrate, an orthographic projection of the first electrode portion at least partially overlaps with that of the first power line, an orthographic projection of the organic insulating layer at an edge of the groove at least partially overlaps with that of the fan-out area in a first overlapping area having at least part not overlapping with an orthographic projection of the first electrode portion.

Abstract: First sub-pixels and third sub-pixels are alternated in first and second directions to form first type of rows along the first direction and first type of columns along the second direction, and second sub-pixels form second type of rows along the first direction and second type of columns along the second direction. In at least one first type of row, a connection line between centers of first and third sub-pixels adjacent to each other is not parallel to the first direction, a connection line between centers of first sub-pixels adjacent to each other is parallel to the first direction, and a connection line between centers of third sub-pixels adjacent to each other is parallel to the first direction. In at least one of the second type of rows, a connection line between centers of second sub-pixels adjacent to each other is parallel to the first direction.

Abstract: Provided are a display panel and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels; a driving circuit; a power line; a connection layer electrically connected to the power line and located on one side of the driving circuit and the power line away from the base substrate, an orthographic projection of the connection layer on the base substrate partially overlaps with that of the driving circuit on the base substrate, and a minimum distance between an edge of the orthographic projection of the connection layer on the base substrate close to the display area and an edge of an orthographic projection of an anode, which is closest to an edge of the display area of a plurality of anodes of the sub-pixels, on the base substrate ranges from 150 to 250 microns; and a cathode.

Abstract: A display substrate, a detection method, and a display device. The display substrate includes: a substrate, including a display region and a peripheral region surrounding the display region; multiple subpixels, multiple data lines, arranged in the display region; a first control signal line, a second control signal line, a crack detection line, and at least one data detection line, arranged in the peripheral region, and the crack detection line is provided around the display region; multiple display screen detection units, arranged in the peripheral region, configured to transmit, according to a control signal provided by the first control signal line, a detection signal provided by the at least one data detection line to at least one of the multiple data lines; multiple crack detection units, arranged in the peripheral region.

Abstract: A display substrate includes a plurality of first pixels and a plurality of second pixels alternately arranged in a first direction and a second direction. Each of the first pixels includes a first sub-pixel and a second sub-pixel, and each of the second pixels includes a third sub-pixel and a second sub-pixel. The second sub-pixels are evenly arranged in a matrix. The first sub-pixel and the third sub-pixel are both in a polygonal shape, and are alternately arranged in the first direction and the second direction. For one first sub-pixel and one third sub-pixel adjacent to each other in the first direction, a line connecting a vertex of the one first sub-pixel closest to the one third sub-pixel with a vertex of the one third sub-pixel closest to the one first sub-pixel intersects an extension line in the first direction and an extension line in the second direction.

Abstract: This disclosure discloses a display panel and a display apparatus. The display panel includes: a substrate, wherein the substrate has a display region and a border region surrounding the display region; the border region includes a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate; the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region; an orthographic projection of the first power voltage line on the substrate is within the first dam region; the first planarization layer is at least within the first dam region and the second dam region, and the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and the first planarization layer has a first groove and a second groove.