Patents by Inventor Sen-Horng Lin

Sen-Horng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Plasma surface treatment method for forming patterned TEOS based silicon oxide layer with reliable via and interconnection formed therethrough
    Patent number: 6294476
    Abstract: A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a silicon oxide dielectric layer, where the silicon oxide dielectric layer is formed through use of a plasma enhanced chemical vapor deposition (PECVD) method employing tetra-ethyl-ortho-silicate (TEOS) as a silicon source material. There is then treated the silicon oxide dielectric layer with a plasma to form a plasma treated silicon oxide dielectric layer. Finally, there is then formed upon the plasma treated silicon oxide dielectric layer a patterned photoresist layer employed in defining the location of a via to be formed through the plasma treated silicon oxide dielectric layer.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: September 25, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Sen-Horng Lin, How-Ming Lien, Yin Chen
  • Plasma surface treatment method for forming patterned TEOS based silicon oxide layer with reliable via and interconnection formed therethrough
    Patent number: 6143666
    Abstract: A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a silicon oxide dielectric layer, where the silicon oxide dielectric layer is formed through use of a plasma enhanced chemical vapor deposition (PECVD) method employing tetra-ethyl-ortho-silicate (TEOS) as a silicon source material. There is then treated the silicon oxide dielectric layer with a plasma to form a plasma treated silicon oxide dielectric layer. Finally, there is then formed upon the plasma treated silicon oxide dielectric layer a patterned photoresist layer employed in defining the location of a via to be formed through the plasma treated silicon oxide dielectric layer.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: November 7, 2000
    Assignee: Vanguard International Seminconductor Company
    Inventors: Sen-Horng Lin, How-Ming Lien, Yin Chen