Abstract: A power capability determination device is arranged to determine a power capability of a power source, and includes a connector, a load circuit, a switch circuit, a voltage monitor circuit, and a processing circuit. The connector is arranged to receive the power source to output an input voltage at a power output terminal. The switch circuit is electrically connected between the load circuit and the power output terminal. The voltage monitor circuit is electrically connected to the power output terminal, and is arranged to monitor the input voltage to generate a monitored voltage value. The processing circuit is electrically connected to the voltage monitor circuit and the switch circuit, and is arranged to control the switch circuit, and in a state of controlling the switch circuit, receive the monitored voltage value and determine the power capability of the power source according to the monitored voltage value.

Abstract: A method for identifying a signal transmission device includes: reading attribute information from a memory device by a first device of a signal processing system, wherein the attribute information records information regarding at least one attribute of the signal transmission device that is coupled between the first device and a second device of the signal processing system; determining the at least one attribute of the signal transmission device by the first device according to the attribute information; and setting a maximum value or a minimum value of a signal output by the first device or the second device according to the at least one attribute.

Abstract: A power capability determination device is arranged to determine a power capability of a power source, and includes a connector, a load circuit, a switch circuit, a voltage monitor circuit, and a processing circuit. The connector is arranged to receive the power source to output an input voltage at a power output terminal. The switch circuit is electrically connected between the load circuit and the power output terminal. The voltage monitor circuit is electrically connected to the power output terminal, and is arranged to monitor the input voltage to generate a monitored voltage value. The processing circuit is electrically connected to the voltage monitor circuit and the switch circuit, and is arranged to control the switch circuit, and in a state of controlling the switch circuit, receive the monitored voltage value and determine the power capability of the power source according to the monitored voltage value.

Abstract: A method for matching parameters applied to a display device and a circuit system that performs the method are provided. In the method, when a display device is activated, a circuit system connects to a panel module of the display device for retrieving parameters from a panel memory. The parameters are such as video display parameters, camera image parameters, speaker audio parameters, and microphone receiving parameters. After the parameters are applied to the circuit system, the circuit system operates the display device using the parameters. The data generated by the circuit system can be adjusted for matching new parameters. Afterwards, when the new parameters are applied to the circuit system, video and audio are outputted according to the matched parameters, and the camera and microphone in the panel module are also operated according to the matched parameters.

Abstract: An electronic device system includes a first electronic device and a power delivery device. The first electronic device is arranged to selectively provide multiple power signals. The power delivery device is arranged to deliver one or more of the power signals. The power signals at least include a first power signal and a second power signal. When the first electronic device detects that the power delivery device is connected to the first electronic device and before a hot plug notification signal is received, the first electronic device provides only the first power signal to the power delivery device. After the first electronic device has received the hot plug notification signal, the first electronic device provides both the first power signal and the second power signal to the power delivery device.

Abstract: A signal transmission device for transmitting at least a video signal between a player device and a display device includes a signal processing device. The signal processing device includes a receiver, a signal processor and a transmitter. The receiver is configured to receive a first video signal. The signal processor is coupled to the receiver and configured to detect an image format or an image resolution of the first video signal and process the first video signal according to the image format or the image resolution to generate a second video signal. An image format of the second video signal is different from the image format of the first video signal or an image resolution of the second video signal is different from the image resolution of the first video signal. The transmitter is configured to output the second video signal.

Abstract: An electronic device system includes a first electronic device and a power delivery device. The first electronic device is arranged to selectively provide multiple power signals. The power delivery device is arranged to deliver one or more of the power signals. The power signals at least include a first power signal and a second power signal. When the first electronic device detects that the power delivery device is connected to the first electronic device and before a hot plug notification signal is received, the first electronic device provides only the first power signal to the power delivery device. After the first electronic device has received the hot plug notification signal, the first electronic device provides both the first power signal and the second power signal to the power delivery device.

Abstract: A signal transmission device for transmitting at least a video signal between a player device and a display device includes a signal processing device. The signal processing device includes a receiver, a signal processor and a transmitter. The receiver is configured to receive a first video signal. The signal processor is coupled to the receiver and configured to detect an image format or an image resolution of the first video signal and process the first video signal according to the image format or the image resolution to generate a second video signal. An image format of the second video signal is different from the image format of the first video signal or an image resolution of the second video signal is different from the image resolution of the first video signal. The transmitter is configured to output the second video signal.

Abstract: A method for identifying a signal transmission device includes: reading attribute information from a memory device by a first device of a signal processing system, wherein the attribute information records information regarding at least one attribute of the signal transmission device that is coupled between the first device and a second device of the signal processing system; determining the at least one attribute of the signal transmission device by the first device according to the attribute information; and setting a maximum value or a minimum value of a signal output by the first device or the second device according to the at least one attribute.

Abstract: A video processing system includes a main chip and a processing chip. The main chip receives first data. The processing chip is coupled to the main chip, and receives second data and to perform a video processing on at least one of the first data transmitted from the main chip and the second data, in order to drive a display panel. First video carried on the first data or second video on the second data has a first resolution, and the first resolution is at least 8K ultra high definition.

Abstract: A video processing system includes a main chip and a processing chip. The main chip receives first data. The processing chip is coupled to the main chip, and receives second data and to perform a video processing on at least one of the first data transmitted from the main chip and the second data, in order to drive a display panel. First video carried on the first data or second video on the second data has a first resolution, and the first resolution is at least 8K ultra high definition.

Abstract: A video processing system includes a main chip and a processing chip. The main chip receives first data. The processing chip is coupled to the main chip, and receives second data and to perform a video processing on at least one of the first data transmitted from the main chip and the second data, in order to drive a display panel. First video carried on the first data or second video on the second data has a first resolution, and the first resolution is at least 8K ultra high definition.

Abstract: A video processing system includes a main chip and a processing chip. The main chip receives first data. The processing chip is coupled to the main chip, and receives second data and to perform a video processing on at least one of the first data transmitted from the main chip and the second data, in order to drive a display panel. First video carried on the first data or second video on the second data has a first resolution, and the first resolution is at least 8K ultra high definition.

Abstract: A bidirectional data transmission system and the transmitting method thereof are disclosed. A video graphics array interface or an interface including a display data channel is utilized in the bidirectional data transmission to transmit data in bi-direction.

Abstract: A FIFO apparatus uses a first clock signal in a first clock domain to receive an input signal and uses a second clock signal in a second clock domain to output an output signal. An example apparatus includes: at least three write registers belonging to the first clock domain for receiving the input signal. Each of the write registers has a first output. A first controller belonging to the first clock domain enables the registers, in accordance with an order, to generate an initial signal. A multiplexer receives the first outputs. A second controller belonging to the second clock domain, receives the initial signal through an asynchronous interface and controls the multiplexer to output the first outputs in accordance with the order to be the output signal, wherein the second clock domain is a clock tree generated based on the first clock domain.

Abstract: A FIFO device crossing a first and a second power domains is provided. The device comprises: a plurality of input registers belonging to the first power domain for receiving the input signal, and each of the input register having a first output; a first controller belonging to the first power domain for enabling the registers according to specific order and generating an initial signal; a multiplexer receiving the first outputs according to the specific order to generate a second output; a second controller belonging to second power domain, receiving the initial signal through an asynchronous interface and controlling the multiplexer to output second output; and an output register belonging to second power domain receiving the second output. First power domain operates according to a first clock signal. Second power domain operates according to a second clock signal. The first and second clock signals are asynchronous.

Abstract: A FIFO device crossing a first and a second power domains is provided. The device comprises: a plurality of input registers belonging to the first power domain for receiving the input signal, and each of the input register having a first output; a first controller belonging to the first power domain for enabling the registers according to specific order and generating an initial signal; a multiplexer receiving the first outputs according to the specific order to generate a second output; a second controller belonging to second power domain, receiving the initial signal through an asynchronous interface and controlling the multiplexer to output second output; and an output register belonging to second power domain receiving the second output. First power domain operates according to a first clock signal. Second power domain operates according to a second clock signal. The first and second clock signals are asynchronous.

Abstract: A FIFO apparatus uses a first clock signal in a first clock domain to receive an input signal and uses a second clock signal in a second clock domain to output an output signal. An example apparatus includes: at least three write registers belonging to the first clock domain for receiving the input signal. Each of the write registers has a first output. A first controller belonging to the first clock domain enables the registers, in accordance with an order, to generate an initial signal. A multiplexer receives the first outputs. A second controller belonging to the second clock domain, receives the initial signal through an asynchronous interface and controls the multiplexer to output the first outputs in accordance with the order to be the output signal, wherein the second clock domain is a clock tree generated based on the first clock domain.

Abstract: A method for processing video data including a plurality of fields is disclosed. The method includes: dividing the plurality of fields into a plurality of image blocks; examining each image block of a target field to determine whether each image block of the target field corresponds to a film mode or a non-film mode, wherein the target field is one of the plurality of fields; examining each image block of the target field that corresponds to the film mode to determine whether each image block corresponds to a pure film mode or a mix film mode; and utilizing a specific image processing mechanism to process each of the plurality of image blocks.

Abstract: A method for controlling a video data to enter a film mode for processing is disclosed, the video data including a plurality of target fields, the method including: determining whether a target field of the target fields is capable of being merged with a first neighboring field of the target field; if the target field can be merged with the first neighboring field, adding one to a merging number; and repeating the above steps until the merging number is determined to be not less than N, and then entering the film mode to process the video data; wherein N is a positive integer not less than two.