Patents by Inventor Senthilkumar THORAVI RAJAVEL

Senthilkumar THORAVI RAJAVEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Machine-learning enhanced compiler
    Patent number: 11853662
    Abstract: A method includes storing a base model generated using base data and receiving training data generated by compiling circuit designs. The method also includes generating, using the training data, a tuned model and generating, using the training data and the base data, a hybrid model. The method further includes receiving a selected cost function and biasing the base model, the tuned model, and the hybrid model using the selected cost function.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: December 26, 2023
    Assignee: Synopsys, Inc.
    Inventors: Sankaranarayanan Srinivasan, Senthilkumar Thoravi Rajavel, Vinod Kumar Nakkala, Avinash Anantharamu, Pierre Clement, Saibal Ghosh, Sashikala Oblisetty, Etienne Lepercq
  • MACHINE-LEARNING ENHANCED COMPILER
    Publication number: 20220318468
    Abstract: A method includes storing a base model generated using base data and receiving training data generated by compiling circuit designs. The method also includes generating, using the training data, a tuned model and generating, using the training data and the base data, a hybrid model. The method further includes receiving a selected cost function and biasing the base model, the tuned model, and the hybrid model using the selected cost function.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 6, 2022
    Inventors: Sankaranarayanan SRINIVASAN, Senthilkumar THORAVI RAJAVEL, Vinod Kumar NAKKALA, Avinash ANANTHARAMU, Pierre CLEMENT, Saibal GHOSH, Sashikala OBLISETTY, Etienne LEPERCQ
  • Machine-learning enhanced compiler
    Patent number: 11366948
    Abstract: A method includes generating a netlist for a circuit design and predicting, by applying a first machine learning model to the netlist, a first compile time for the circuit design. The method also includes predicting, by applying a second machine learning model to the netlist, a first place and route strategy based on the first compile time. The method further includes adjusting a logic of the circuit design in accordance with the first place and route strategy.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: June 21, 2022
    Assignee: Synopsys, Inc.
    Inventors: Sankaranarayanan Srinivasan, Senthilkumar Thoravi Rajavel, Vinod Kumar Nakkala, Avinash Anantharamu, Pierre Clement, Saibal Ghosh, Sashikala Oblisetty, Etienne Lepercq
  • MACHINE-LEARNING ENHANCED COMPILER
    Publication number: 20210117601
    Abstract: A method includes generating a netlist for a circuit design and predicting, by applying a first machine learning model to the netlist, a first compile time for the circuit design. The method also includes predicting, by applying a second machine learning model to the netlist, a first place and route strategy based on the first compile time. The method further includes adjusting a logic of the circuit design in accordance with the first place and route strategy.
    Type: Application
    Filed: August 13, 2020
    Publication date: April 22, 2021
    Inventors: Sankaranarayanan SRINIVASAN, Senthilkumar THORAVI RAJAVEL, Vinod Kumar NAKKALA, Avinash ANANTHARAMU, Pierre CLEMENT, Saibal GHOSH, Sashikala OBLISETTY, Etienne LEPERCQ