Patents by Inventor Seo-In Pak

Seo-In Pak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180294364
    Abstract: A schottky diode includes a conduction layer of a first conduction type, a well region of a second conduction type disposed in the conduction layer, a first isolation region disposed in the conduction layer, where the first isolation region is spaced apart from the well region, a first junction region of the second conduction type disposed in the conduction layer, where the first junction region is adjacent the first isolation region and spaced apart from the well region, a second junction region of the first conduction type disposed in the conduction layer, where the second junction region is adjacent the first isolation region and a schottky electrode covering a schottky junction surface corresponding to an upper surface of the conduction layer between the well region and the first junction region.
    Type: Application
    Filed: December 26, 2017
    Publication date: October 11, 2018
    Inventors: Seo-In Pak, Yong-Don Kim, Seon-Joo Woo, Dae-Hyun Jo
  • Patent number: 10008616
    Abstract: The electronic device having a Schottky diode includes first and second electrodes disposed on a semiconductor substrate and spaced apart from each other. A first semiconductor region is formed within the semiconductor substrate. The first semiconductor region may include a first surface portion in contact with the second electrode, forming a Schottky diode with the second electrode. A second semiconductor region having the same conductivity-type as the first semiconductor region and overlapping the first electrode is formed within the semiconductor substrate. A third semiconductor region having a different conductivity-type from the first semiconductor region, and having a first portion and a second portion spaced apart from each other, is formed within the semiconductor substrate. An isolation region is disposed between the second and the third semiconductor regions. The isolation region includes a first isolation portion and a second isolation portion spaced apart from each other.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: June 26, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Don Kim, Seo In Pak
  • Publication number: 20170373199
    Abstract: The electronic device having a Schottky diode includes first and second electrodes disposed on a semiconductor substrate and spaced apart from each other. A first semiconductor region is formed within the semiconductor substrate. The first semiconductor region may include a first surface portion in contact with the second electrode, forming a Schottky diode with the second electrode. A second semiconductor region having the same conductivity-type as the first semiconductor region and overlapping the first electrode is formed within the semiconductor substrate. A third semiconductor region having a different conductivity-type from the first semiconductor region, and having a first portion and a second portion spaced apart from each other, is formed within the semiconductor substrate. An isolation region is disposed between the second and the third semiconductor regions. The isolation region includes a first isolation portion and a second isolation portion spaced apart from each other.
    Type: Application
    Filed: March 22, 2017
    Publication date: December 28, 2017
    Inventors: Yong Don KIM, Seo In PAK
  • Patent number: 8470658
    Abstract: A semiconductor integrated circuit device and method of fabricating a semiconductor integrated circuit device, the method including preparing a first conductivity type substrate including a first conductivity type impurity such that the first conductivity type substrate has a first impurity concentration; forming a buried impurity layer using blank implant such that the buried impurity layer includes a first conductivity type impurity and has a second impurity concentration higher than the first impurity concentration; forming an epitaxial layer on the substrate having the buried impurity layer thereon; and forming semiconductor devices and a device isolation region in or on the epitaxial layer.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: June 25, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Don Kim, Hoon Chang, Seo-In Pak
  • Publication number: 20110248342
    Abstract: A semiconductor integrated circuit device and method of fabricating a semiconductor integrated circuit device, the method including preparing a first conductivity type substrate including a first conductivity type impurity such that the first conductivity type substrate has a first impurity concentration; forming a buried impurity layer using blank implant such that the buried impurity layer includes a first conductivity type impurity and has a second impurity concentration higher than the first impurity concentration; forming an epitaxial layer on the substrate having the buried impurity layer thereon; and forming semiconductor devices and a device isolation region in or on the epitaxial layer.
    Type: Application
    Filed: March 23, 2011
    Publication date: October 13, 2011
    Inventors: Yong-Don KIM, Hoon Chang, Seo-In Pak