Patents by Inventor Seo Yeon Ahn
Seo Yeon Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220148886Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: August 23, 2021Publication date: May 12, 2022Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 11101144Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: December 23, 2019Date of Patent: August 24, 2021Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20200303212Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: December 23, 2019Publication date: September 24, 2020Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10515825Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: September 18, 2018Date of Patent: December 24, 2019Assignee: Amkor Technology, Inc.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20190067035Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: September 18, 2018Publication date: February 28, 2019Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10079157Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: December 22, 2015Date of Patent: September 18, 2018Assignee: Amkor Technology, Inc.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 9793180Abstract: A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise connection verification for a first one or more mounted components prior to additional assembly.Type: GrantFiled: June 24, 2014Date of Patent: October 17, 2017Assignee: AMKOR TECHNOLOGY, INC.Inventors: Seo Yeon Ahn, Doo Hyun Park, Pil Je Sung, Won Chul Do, Young Rae Kim, Seung Chul Han, Joo Hyun Kim, Jong Sik Paek
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Patent number: 9449946Abstract: Disclosed are a semiconductor device and a manufacturing method thereof, which can achieve miniaturization and improvement in the integration level by forming a substrate using a pattern layer implemented on a wafer in a semiconductor fabrication (FAB) process. In one exemplified embodiment, the manufacturing method of the semiconductor device includes preparing a first semiconductor die including a plurality of through electrodes and a plurality of first conductive pillars, mounting the first semiconductor die to connect the first conductive pillars to the pattern layer provided on a wafer, forming a first encapsulant to cover the pattern layer and the first semiconductor die, mounting a second semiconductor die to electrically connect second conductive pillars provided in the second semiconductor die to the plurality of through electrodes exposed to a second surface of the first semiconductor die, and removing the wafer from a first surface of the pattern layer.Type: GrantFiled: March 18, 2014Date of Patent: September 20, 2016Assignee: Amkor Technology, Inc.Inventors: Pil Je Sung, Seong Min Seo, Jong Sik Paek, Seo Yeon Ahn, Hui Tae Kim
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Publication number: 20160189980Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: December 22, 2015Publication date: June 30, 2016Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 9196601Abstract: Various aspects of the present disclosure provide a semiconductor device and a method for manufacturing thereof, which can facilitate stacking of semiconductor die while saving manufacturing cost. In an example embodiment, the semiconductor device may comprise a first semiconductor die, a second semiconductor die bonded to a top surface of the first semiconductor die, and a redistribution layer electrically connecting the first semiconductor die to the second semiconductor die, wherein the redistribution layer is formed to extend along surrounding side portions of the second semiconductor die.Type: GrantFiled: November 22, 2013Date of Patent: November 24, 2015Inventors: Doo Hyun Park, Seong Min Seo, Seok Woo Yun, Ji Hun Lee, Seo Yeon Ahn, Young Rae Kim, Jong Sik Paek
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Publication number: 20150206807Abstract: A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise connection verification for a first one or more mounted components prior to additional assembly.Type: ApplicationFiled: June 24, 2014Publication date: July 23, 2015Inventors: Seo Yeon Ahn, Doo Hyun Park, Pil Je Sung, Won Chul Do, Young Rae Kim, Seung Chul Han, Joo Hyun Kim, Jong Sik Paek
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Publication number: 20150041980Abstract: A method for forming a reduced thickness semiconductor package is disclosed and may include providing a first die with an active layer, a through-silicon via (TSV), and a pattern and an under bump metal (UBM) in a dielectric layer on the active layer. A carrier may be bonded to the dielectric layer and the UBM. The first die may be thinned to expose the TSV. A bump pad may be formed on the exposed TSV and a second die may be bonded to the bump pad. The first die, the second die, and an outer surface of the dielectric layer may be encapsulated utilizing a first encapsulant. The carrier may be removed from the dielectric layer and the UBM, and a solder ball may be formed on the UBM. A groove may be formed through the dielectric layer and into the first die.Type: ApplicationFiled: August 6, 2014Publication date: February 12, 2015Inventors: Seo Yeon Ahn, Pil Je Sung, Doo Hyun Park, Jong Sik Paek, Young Rae Kim, Hui Tae Kim, Yong Song, Seok Woo Yun
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Publication number: 20150021791Abstract: Various aspects of the present disclosure provide a semiconductor device and a method for manufacturing thereof, which can facilitate stacking of semiconductor die while saving manufacturing cost. In an example embodiment, the semiconductor device may comprise a first semiconductor die, a second semiconductor die bonded to a top surface of the first semiconductor die, and a redistribution layer electrically connecting the first semiconductor die to the second semiconductor die, wherein the redistribution layer is formed to extend along surrounding side portions of the second semiconductor die.Type: ApplicationFiled: November 22, 2013Publication date: January 22, 2015Applicant: Amkor Technology, Inc.Inventors: Doo Hyun Park, Seong Min Seo, Seok Woo Yun, Ji Hun Lee, Seo Yeon Ahn, Young Rae Kim, Jong Sik Paek
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Publication number: 20140284785Abstract: Disclosed are a semiconductor device and a manufacturing method thereof, which can achieve miniaturization and improvement in the integration level by forming a substrate using a pattern layer implemented on a wafer in a semiconductor fabrication (FAB) process. In one exemplified embodiment, the manufacturing method of the semiconductor device includes preparing a first semiconductor die including a plurality of through electrodes and a plurality of first conductive pillars, mounting the first semiconductor die to connect the first conductive pillars to the pattern layer provided on a wafer, forming a first encapsulant to cover the pattern layer and the first semiconductor die, mounting a second semiconductor die to electrically connect second conductive pillars provided in the second semiconductor die to the plurality of through electrodes exposed to a second surface of the first semiconductor die, and removing the wafer from a first surface of the pattern layer.Type: ApplicationFiled: March 18, 2014Publication date: September 25, 2014Applicant: Amkor Technology, Inc.Inventors: Pil Je Sung, Seong Min Seo, Jong Sik Paek, Seo Yeon Ahn, Hui Tae Kim