Abstract: An operating room allocation apparatus may be provided. The apparatus according to an embodiment of the present disclosure may include: an information obtaining unit configured to obtain information about patient's entry and exit times in each operating room; a first calculation unit configured to calculate a utilization rate of the operating room for each certain time period based on the patient's entry and exit times; and a second calculation unit configured to receive certain time information from a user and calculate an average utilization rate by time period in the received time information.

Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.

Abstract: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.

Abstract: A bubble type waterless shampoo composition. 0.1 to 5 wt % of potassium cocoyl hydrolyzed collagen and 0.01 to 2 wt % of palmitoyl oligopeptide as natural surfactants. 0.1 to 7 wt % of cocamidopropyl betaine as an amphoteric ion. 0.01 to 0.8 wt % of a citric acid as an organic acid. 0.1 to 4 wt % of sodium carbonate as inorganic salt. 0.01 to 0.5 wt % of origanum vulgare leaf oil. 0.01 to 0.6 wt % of a gallic acid. 0.01 to 3 wt % of glycerin. The rest of aqua water having a function of a solvent made by refining tap water through distilling or ion-exchange resin ion.

Abstract: A bubble type waterless shampoo composition. 0.1 to 5 wt % of potassium cocoyl hydrolyzed collagen and 0.01 to 2 wt % of palmitoyl oligopeptide as natural surfactants. 0.1 to 7 wt % of cocamidopropyl betaine as an amphoteric ion. 0.01 to 0.8 wt % of a citric acid as an organic acid. 0.1 to 4 wt % of sodium carbonate as inorganic salt. 0.01 to 0.5 wt % of origanum vulgare leaf oil. 0.01 to 0.6 wt % of a gallic acid. 0.01 to 3 wt % of glycerin. The rest of aqua water having a function of a solvent made by refining tap water through distilling or ion-exchange resin ion.