Patents by Inventor Seok-hyeong Kang

Seok-hyeong Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9166567
    Abstract: A power-gating circuit and devices including the same are provided. The power-gating circuit includes a flip-flop configured to receive a first power supply voltage and a gated clock signal to operate and a switch circuit connected between a first power supply voltage source configured to supply the first power supply voltage and a second power supply voltage source configured to supply a second power supply voltage. The switch circuit includes a first switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to a clock enable signal and a second switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to the first power supply voltage.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: October 20, 2015
    Assignees: UNIVERSITY OF CALIFORNIA, SAN DIEGO, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bong Il Park, Andrew B. Kahng, Seok Hyeong Kang, Jae Gon Lee
  • Publication number: 20140266401
    Abstract: A power-gating circuit and devices including the same are provided. The power-gating circuit includes a flip-flop configured to receive a first power supply voltage and a gated clock signal to operate and a switch circuit connected between a first power supply voltage source configured to supply the first power supply voltage and a second power supply voltage source configured to supply a second power supply voltage. The switch circuit includes a first switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to a clock enable signal and a second switch configured to be connected between the first power supply voltage source and the second power supply voltage source and to operate in response to the first power supply voltage.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Inventors: Bong Il PARK, Andrew B. KAHNG, Seok Hyeong KANG, Jae Gon LEE
  • Patent number: 7849379
    Abstract: A device and method for determining a defective area on an optical media (disc) by counting the number of errors within ECC blocks of the data stored thereon. The defect detection is generally performed by Error Counters and Comparator circuits, for counting the number of occurrences of errors (e.g., parity errors) in an ECC block of the data and for comparing the counted number of occurrences of errors with a supplied threshold. The threshold may be preset at a maximum to distinguish between “correctable” and “uncorrectable” numbers of errors, or may be set lower to better secure the recorded data and to improve the resiliency of the media to subsequent scratches, fingerprints, etc. When the threshold is exceeded, the area is determined to be defective. A position-determining unit keeps track of the location of the ECC block under examination and flags the position of the defective area based on the position of the ECC block containing a number of errors exceeding the threshold.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: December 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-hyeong Kang
  • Publication number: 20060156180
    Abstract: A device and method for determining a defective area on an optical media (disc) by counting the number of errors within ECC blocks of the data stored thereon. The defect detection is generally performed by Error Counters and Comparator circuits, for counting the number of occurrences of errors (e.g., parity errors) in an ECC block of the data and for comparing the counted number of occurrences of errors with a supplied threshold. The threshold may be preset at a maximum to distinguish between “correctable” and “uncorrectable” numbers of errors, or may be set lower to better secure the recorded data and to improve the resiliency of the media to subsequent scratches, fingerprints, etc. When the threshold is exceeded, the area is determined to be defective. A position-determining unit keeps track of the location of the ECC block under examination and flags the position of the defective area based on the position of the ECC block containing a number of errors exceeding the threshold.
    Type: Application
    Filed: October 3, 2005
    Publication date: July 13, 2006
    Inventor: Seok-hyeong Kang