Patents by Inventor Seok Hyun Lee

Seok Hyun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128022
    Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode; and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of grains and grain boundaries disposed between adjacent grains. The grain boundary includes a secondary phase including Sn, a rare-earth element, and a first subcomponent. The rare-earth element includes at least one of Y, Dy, Ho, Er, Gd, Ce, Nd, Sm, Tb, Tm, La, Gd and Yb. The first subcomponent includes at least one of Si, Mg, and Al.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Woo Kim, Chang Hak Choi, Seok Hyun Yoon, Ki Yong Lee, Jong Myeong Jeon
  • Patent number: 11950501
    Abstract: An organic light emitting device including: a substrate; a first electrode; a second electrode; and an organic layer interposed between the first electrode and the second electrode and including an emission layer, wherein one of the first electrode and the second electrode is a reflective electrode and the other is a semitransparent or transparent electrode, and wherein the organic layer includes a layer having at least one of the compounds having at least one carbazole group, and a flat panel display device including the organic light emitting device. The organic light emitting device has low driving voltage, excellent current density, high brightness, excellent color purity, high efficiency, and long lifetime.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 2, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seok-Hwan Hwang, Young-Kook Kim, Yoon-Hyun Kwak, Jong-Hyuk Lee, Kwan-Hee Lee, Min-Seung Chun
  • Publication number: 20240107840
    Abstract: A display device includes a first semiconductor layer disposed on a substrate; a first insulating layer disposed on the first semiconductor layer; a scan line disposed on the first insulating layer; a second insulating layer on the scan line; an inverted scan line on the second insulating layer; a third insulating layer disposed on the inverted scan line; a second semiconductor layer disposed on the third insulating layer; a fourth insulating layer disposed on the second semiconductor layer; an initializing voltage line disposed on the fourth insulating layer and overlapping the scan line; a first transistor including a channel disposed in the first semiconductor layer and receiving a gate signal through the scan line; and a second transistor including a channel disposed in the second semiconductor layer and receiving a gate signal through the inverted scan line.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Se Wan SON, Moo Soon KO, Kyung Hyun BAEK, Seok Je SEONG, Jae Hyun LEE, Jeong-Soo LEE, Ji Seon LEE, Yoon-Jong CHO
  • Publication number: 20240055337
    Abstract: A semiconductor package includes a first semiconductor chip having a first top surface and an opposite first bottom surface, first pads on the first top surface, each having a first width and a first height, second pads on the first top surface further outward from a center of the first semiconductor chip, each having a second width less than the first width and a second height greater than the first height. The semiconductor package further includes a second semiconductor chip having a second bottom surface which faces the first top surface and an opposite second top surface, third pads on the second bottom surface which are connected to the first pads, and fourth pads on the second bottom surface which are connected to the second pads. The second bottom surface is convex.
    Type: Application
    Filed: April 28, 2023
    Publication date: February 15, 2024
    Inventors: Hwan Young CHOI, Seok Hyun LEE, Jung Min KO, Seok Geun AHN
  • Publication number: 20240004292
    Abstract: A positive-type photosensitive resin composition, an insulating film made from the same, and a display device including such insulating film are provided. The positive photosensitive resin composition is excellent in sensitivity and has excellent chemical resistance, heat resistance, and hygroscopicity by including a polymer containing a hydroxyl group.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Tai Hoon YEO, Hyoc Min YOUN, Dong Myung KIM, Sun Hee LEE, Ah Rum PARK, Gun Seok JANG, Seok Hyun LEE, Nu Ri OH, In Ho SONG
  • Publication number: 20230396890
    Abstract: Image processor circuitry includes a memory storing a program of instructions, and processing circuitry configured to execute the program of instructions to receive input data from an image sensor and detect an operation mode of the image sensor based on the input data, provide configuration data determined in association with the operation mode of the image sensor, and process image data in the input data in accordance with the operation mode and the configuration data.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seok Hyun LEE, Whee Woong LEE, Kyung Ah JEONG
  • Patent number: 11839110
    Abstract: An organic light-emitting display device comprises a substrate, a driving thin-film transistor including an active layer on the substrate, source and drain electrodes directly contacting the active layer, and a gate electrode on the active layer, and an organic light-emitting element connected to the driving thin-film transistor. Each of the source and drain electrodes of the driving thin-film transistor exposes a respective side surface of the active layer.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 5, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Seok-Hyun Lee, Woo-Sup Shin, Sang-Moo Park, Chang-Wook Song, Hae-Lim Jung
  • Publication number: 20230341101
    Abstract: A lamp for a vehicle includes a first beam pattern formation part configured to emit first light for a first beam pattern and a lens configured to form the first beam pattern by transmitting the first light. The first beam pattern formation part includes a first light source that emits the first light; and a shield configured to block a portion of the first light that is emitted from the first light source toward the lens. The lens includes a spread lens that concentrates incident light to a focal line having a linear shape and a spot lens that concentrates incident light to a point.
    Type: Application
    Filed: April 21, 2023
    Publication date: October 26, 2023
    Inventors: Jun Tae KIM, Ki Beom PARK, Seong Won CHOI, Yong Suk PARK, Seok Hyun LEE
  • Publication number: 20230330886
    Abstract: The present invention is configured such that a guide bar for supporting a diagnostic reagent paper includes a groove and the groove prevents the diagnostic reagent paper from being supported by a guide member in a section where knives using a shear force cut the diagnostic reagent paper, whereby a pressed line generated when the guide member presses the diagnostic reagent paper due to a cutting force by the knives is prevented from being formed on a strip so as to eliminate defects of the strip. In particular, the present invention is configured such that the guide member is installed to be disposed to pass through a space between a first shaft and a second shaft, each formed by repeatedly arranging two knives facing each other and one space, so as to guide the diagnostic reagent paper, whereby a section through which the diagnostic reagent paper passes has a substantially rectangular shape.
    Type: Application
    Filed: October 14, 2021
    Publication date: October 19, 2023
    Inventors: Seok Hyun LEE, Won Ha LEE
  • Patent number: 11791286
    Abstract: Some example embodiments relate to a semiconductor device and a semiconductor package. The semiconductor package includes a substrate including a conductive layer, an insulating layer coating the substrate, the insulating layer including an opening exposing at least part of the conductive layer, and an under-bump metal layer electrically connected to the at least part of the conductive layer exposed through the opening, wherein the insulating layer includes at least one recess adjacent to the opening, and the under-bump metal layer fills the at least one recess. The semiconductor device and the semiconductor package may have improved drop test characteristics and impact resistance.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: October 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youn-ji Min, Seok-hyun Lee
  • Publication number: 20230317623
    Abstract: Provided is a semiconductor package including an interposer. The semiconductor package includes: a package base substrate; a lower redistribution line structure disposed on the package base substrate and including a plurality of lower redistribution line patterns; at least one interposer including a plurality of first connection pillars spaced apart from each other on the lower redistribution line structure and connected respectively to portions of the plurality of lower redistribution line patterns, and a plurality of connection wiring patterns; an upper redistribution line structure including a plurality of upper redistribution line patterns connected respectively to the plurality of first connection pillars and the plurality of connection wiring patterns, on the plurality of first connection pillars and the at least one interposer; and at least two semiconductor chips adhered on the upper redistribution line structure while being spaced apart from each other.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 5, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-youn KIM, Seok-hyun LEE
  • Patent number: 11758284
    Abstract: Image processor circuitry includes a memory storing a program of instructions, and processing circuitry configured to execute the program of instructions to receive input data from an image sensor and detect an operation mode of the image sensor based on the input data, provide configuration data determined in association with the operation mode of the image sensor, and process image data in the input data in accordance with the operation mode and the configuration data.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: September 12, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok Hyun Lee, Whee Woong Lee, Kyung Ah Jeong
  • Patent number: 11715645
    Abstract: A method for fabricating a semiconductor package, the method including: forming a release layer on a first carrier substrate, wherein the release layer includes a first portion and a second portion, wherein the first portion has a first thickness, and the second portion has a second thickness thicker than the first thickness; forming a barrier layer on the release layer; forming a redistribution layer on the barrier layer, wherein the redistribution layer includes wirings and an insulating layer; mounting a semiconductor chip on the redistribution layer; forming a molding layer on the redistribution layer to at least partially surround the semiconductor chip; attaching a second carrier substrate onto the molding layer; removing the first carrier substrate and the release layer; removing the barrier layer; and attaching a solder ball onto the redistribution layer exposed by removal of the barrier layer and the second portion of the release layer.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: August 1, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Ho Park, Jin-Woo Park, Seok Hyun Lee, Jae Gwon Jang, Gwang Jae Jeon
  • Patent number: 11710701
    Abstract: Provided is a semiconductor package including an interposer. The semiconductor package includes: a package base substrate; a lower redistribution line structure disposed on the package base substrate and including a plurality of lower redistribution line patterns; at least one interposer including a plurality of first connection pillars spaced apart from each other on the lower redistribution line structure and connected respectively to portions of the plurality of lower redistribution line patterns, and a plurality of connection wiring patterns; an upper redistribution line structure including a plurality of upper redistribution line patterns connected respectively to the plurality of first connection pillars and the plurality of connection wiring patterns, on the plurality of first connection pillars and the at least one interposer; and at least two semiconductor chips adhered on the upper redistribution line structure while being spaced apart from each other.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: July 25, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-youn Kim, Seok-hyun Lee
  • Publication number: 20230205085
    Abstract: A positive photosensitive resin composition and, more specifically, a positive photosensitive resin composition includes an alkali-soluble polymer resin comprising a polyimide precursor comprising a specific chemical structure; a quinone diazide compound; and a solvent. The positive photosensitive resin composition is a suitable matter for next-generation flexible displays and semiconductor packages.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 29, 2023
    Inventors: Hyoc Min YOUN, Tai Hoon YEO, Dong Myung KIM, Ah Rum PARK, Gun Seok JANG, Seok Hyun LEE, Nu Ri OH, In Ho SONG, Sun Hee LEE
  • Patent number: 11652090
    Abstract: A semiconductor package includes a first redistribution layer. A plurality of posts is disposed on the first redistribution layer. A semiconductor chip is disposed on the first redistribution layer between the plurality of posts. A second redistribution layer is formed on the plurality of posts and the semiconductor chip. A first memory stack is disposed on the second redistribution layer. A height of each of the plurality of posts extends from an upper surface of the first redistribution layer to a lower surface of the second redistribution layer.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: May 16, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Jun Bae, Dong Kyu Kim, Jin-Woo Park, Seok Hyun Lee
  • Publication number: 20230068587
    Abstract: A semiconductor package including a passivation film, a mold layer on the passivation film, a connecting pad having a T shape, the T shape including a first portion and a second portion on the first portion, the first portion penetrating the passivation film, the second portion penetrating a part of the mold layer, a solder ball on the first portion of the connecting pad, an element on the second portion of the connecting pad, a wiring structure on the mold layer, the wiring structure including an insulating layer and a wiring pattern inside the insulating layer, and a semiconductor chip on the wiring structure may be provided.
    Type: Application
    Filed: June 29, 2022
    Publication date: March 2, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yae Jung YOON, Eung Kyu KIM, Min Jun BAE, Kyoung Lim SUK, Seok Hyun LEE, Jae Gwon JANG
  • Publication number: 20230051576
    Abstract: The present invention is configured such that an adjustment nut for fixing spacers and blades repeatedly fitted to a shaft is provided with at least two concentricity adjustment screws, and, with the spacers and the blades fixed by the adjustment nut, the spacers and the blades are pushed by the concentricity adjustment screws in the direction of the shaft to enable concentricity adjustment, and thus, without causing defects, the blades are protected and can be used for a long time. In particular, according to the present invention, while one side shaft with respect to a diagnostic sheet is elastically supported, position adjustment in the longitudinal direction thereof is possible, and also projections are formed on the peripheries of the surfaces of the spacers facing the cutting edges of the blades thus to provide extra spaces for the blades in which the blades move, thereby preventing the deformation of cut strips and the damages on the blades.
    Type: Application
    Filed: May 27, 2021
    Publication date: February 16, 2023
    Inventor: Seok Hyun LEE
  • Patent number: 11462464
    Abstract: A fan-out semiconductor package including a redistribution line structure is provided. The fan-out semiconductor package includes a plurality of redistribution line insulating layers and a plurality of redistribution line patterns arranged on at least one of an upper surface and a lower surface of each of the plurality of redistribution line insulating layers; at least one semiconductor chip arranged on the redistribution line structure and occupying a footprint having a horizontal width that is less than a horizontal width of the redistribution line structure; and a molding member surrounding the at least one semiconductor chip on the redistribution line structure and having a horizontal width that is greater than the horizontal width of the redistribution line structure, wherein the plurality of redistribution line insulating layers have a cascade structure.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: October 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-youn Kim, Seok-hyun Lee
  • Publication number: 20220270975
    Abstract: Provided is a semiconductor package including an interposer. The semiconductor package includes: a package base substrate; a lower redistribution line structure disposed on the package base substrate and including a plurality of lower redistribution line patterns; at least one interposer including a plurality of first connection pillars spaced apart from each other on the lower redistribution line structure and connected respectively to portions of the plurality of lower redistribution line patterns, and a plurality of connection wiring patterns; an upper redistribution line structure including a plurality of upper redistribution line patterns connected respectively to the plurality of first connection pillars and the plurality of connection wiring patterns, on the plurality of first connection pillars and the at least one interposer; and at least two semiconductor chips adhered on the upper redistribution line structure while being spaced apart from each other.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-youn KIM, Seok-hyun LEE