Abstract: A method for linear optical quantum computing includes configuring at least two first Greenberger-Horne-Zeilinger (GHZ) states consisting of three photons; configuring at least one second GHZ state consisting of four or more photons by firstly combining the at least two first GHZ states; generating at least one microcluster; forming a plurality of star clusters consisting of four side qubits around the central qubit; configuring Raussendorf-Harringon-Goyal (RHG) lattice by using the plurality of star clusters; and measuring at least one central qubit of the RHG lattice.

Abstract: A secondary battery includes an electrode assembly having a positive electrode provided with a positive electrode tab, a separator, and a negative electrode provided with a negative electrode tab, the positive electrode, the separator, and the negative electrode being wound, the electrode assembly having a core part at a center thereof; a can configured to receive the electrode assembly therein, the negative electrode tab being connected to the can; a cap assembly coupled to an opening of the can, the positive electrode tab being connected to the cap assembly; and a reinforcing member provided on an end of the separator exposed beyond the positive electrode or the negative electrode to prevent heat of the positive electrode tab or the negative electrode tab from being transferred to the separator.

Abstract: A method for correcting multiple erroneous symbols included in data produces a demodulation flag indicating whether demodulation based on a modulation code such as EFM or ETM is possible. The demodulation flag is used in decoding the data based on the error correcting code. Producing the error locations during decoding in accordance with a Reed-Solomon code comprises the steps of producing an index using ##EQU1## provided .sigma..sub.1, .sigma..sub.2 and .sigma..sub.3 represent coefficients of an error location polynomial, k.sub.1 represents .sigma..sub.1.sup.2 +.sigma..sub.2 and k.sub.2 represents .sigma..sub.1 .sigma..sub.2 +.sigma..sub.3, reading out virtual roots from a specified memory related to the index, and transforming the virtual roots (Z.sub.1, Z.sub.2 and Z.sub.3) into error locations (x.sup.j1, x.sup.j2 and x.sup.j3) in accordance with the following equations.x.sup.j1 =Z.sub.1 (k.sub.1)+.sigma..sub.1x.sup.j2 =Z.sub.2 (k.sub.1)+.sigma..sub.1x.sup.j3 =Z.sub.3 (k.sub.1)+.sigma..sub.

Abstract: A ROM circuit is provided which can reduce the required area by simplifying a circuit construction. The ROM circuit generates N bit of data programmed at the respective cross section of output lines and word lines by decoding address signal. The ROM circuit comprises a decoder, a gate means, a memory cell array and a precharge means in which the decoder generates a word signal from an input address signal, the gate means supplied a word signal to a corresponding word line according to a clock signal, the memory cell array stores the desired data according to the combinational existence of MOS transistors at the respective cross section of the word line and the output lines, and the precharged means precharges the respective output lines according to the clock signal.