Patents by Inventor Seok-Soo Yoon
Seok-Soo Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9011774Abstract: Provided are a barcode nano-wire for decoding a hard magnetic segment by using highly sensitive magnetic sensors and a bio-sensing system using the barcode nano-wire. Integration of hard magnetic and non-magnetic segments produces the barcode nanowire and magnetic segments are detected using highly sensitive magnetoresistance sensors. The non-magnetic segment uses a non-magnetic material and a specific biomolecule for bioanalysis is immobilized at a specific portion of the barcode nano-wire. The hard magnetic material has an advantage of higher coercivity and high remanence magnetization, which is considered as an important parameter in selecting the material. The hard magnetic segments produce distinguishable strong stray fields for individually detecting segments using conventional magnetic sensors for multiplexed bioanalysis.Type: GrantFiled: September 16, 2010Date of Patent: April 21, 2015Assignee: The Industry & Academic Cooperation in Chungnam National UniversityInventors: CheolGi Kim, Vishnubhotla Sudha Rani, Jong-Ryul Jeong, Seok Soo Yoon
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Patent number: 8442178Abstract: A linear phase detector includes an up/down pulse generator operating in response to received data signals and a recovered clock signal. The phase detector generates up and down pulses that have pulse widths proportional to the phase differences between transitions of the received data signals and edges of the recovered clock signal. By generating up and down pulses using a linear phase detector in proportion to a phase error, data signals are effectively recovered, even data signals with significant jitter.Type: GrantFiled: June 3, 2011Date of Patent: May 14, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Chul-Woo Kim, Seok-Soo Yoon, Young-Ho Kwak, In-Ho Lee, Ki-Hong Kim
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Publication number: 20110236260Abstract: Provided are a barcode nano-wire for decoding a hard magnetic segment by using highly sensitive magnetic sensors and a bio-sensing system using the barcode nano-wire. Integration of hard magnetic and non-magnetic segments produces the barcode nanowire and magnetic segments are detected using highly sensitive magnetoresistance sensors. The non-magnetic segment uses a non-magnetic material and a specific biomolecule for bioanalysis is immobilized at a specific portion of the barcode nano-wire. The hard magnetic material has an advantage of higher coercivity and high remanence magnetization, which is considered as an important parameter in selecting the material. The hard magnetic segments produce distinguishable strong stray fields for individually detecting segments using conventional magnetic sensors for multiplexed bioanalysis.Type: ApplicationFiled: September 16, 2010Publication date: September 29, 2011Applicant: The Industry & Academic Cooperation in Chungnam National UniversityInventors: CheolGi Kim, Vishnubhotla Sudha Rani, Jong-Ryul Jeong, Seok Soo Yoon
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Publication number: 20110228887Abstract: A linear phase detector includes an up/down pulse generator operating in response to received data signals and a recovered clock signal. The phase detector generates up and down pulses that have pulse widths proportional to the phase differences between transitions of the received data signals and edges of the recovered clock signal. By generating up and down pulses using a linear phase detector in proportion to a phase error, data signals are effectively recovered, even data signals with significant jitter.Type: ApplicationFiled: June 3, 2011Publication date: September 22, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chul-Woo KIM, Seok-Soo YOON, Young-Ho KWAK, In-Ho LEE, Ki-Hong KIM
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Patent number: 7974375Abstract: A linear phase detector includes an up/down pulse generator operating in response to received data signals and a recovered clock signal. The phase detector generates up and down pulses that have pulse widths proportional to the phase differences between transitions of the received data signals and edges of the recovered clock signal. By generating up and down pulses using a linear phase detector in proportion to a phase error, data signals are effectively recovered, even data signals with significant jitter.Type: GrantFiled: August 23, 2007Date of Patent: July 5, 2011Assignees: Samsung Electronics Co., Ltd., Korea University Industrial & Academic Collaboration FoundationInventors: Chul-Woo Kim, Seok-Soo Yoon, Young-Ho Kwak, In-Ho Lee, Ki-Hong Kim
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Patent number: 7830184Abstract: A frequency multiplier is disclosed. A plurality of voltage regulators each regulate levels of voltages at first and second common nodes in response to a corresponding one of input signals from a voltage-controlled delay line. An input buffer charges the first node or discharges the second node in response to a feedback signal. An output buffer regulates a level of a voltage at an output node and outputs a frequency-multiplied clock signal and the feedback signal corresponding to the voltage level of the output node. A discharge circuit discharges the first node before a rising edge of each of the input signals from the voltage-controlled delay line is inputted. A charge circuit charges the second node before the rising edge of each of the input signals from the voltage-controlled delay line is inputted.Type: GrantFiled: July 27, 2005Date of Patent: November 9, 2010Assignee: Korea University Industry and Academy Cooperation FoundationInventors: Chul-Woo Kim, Jin-Han Kim, Seok-Ryung Yoon, Young-Ho Kwak, Seok-Soo Yoon
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Patent number: 7639086Abstract: A thermometer code generator includes n bit storing stages that are coupled to each other, where n is an integer greater than 1, and the n bit storing stages store a thermometer code, and are adapted to increase the stored thermometer code by 1 in synchronization with a clock signal when an up signal is active, to decrease the stored thermometer code by 1 in synchronization with the clock signal when a down signal is active, and to maintain the stored thermometer code in synchronization with the clock signal when both of the up signal and the down signal are inactive.Type: GrantFiled: August 23, 2007Date of Patent: December 29, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: In-Ho Lee, Seok-Soo Yoon, Young-Ho Kwak, Ki-Hong Kim, Chulwoo Kim
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Publication number: 20090189652Abstract: A frequency multiplier is disclosed. A plurality of voltage regulators each regulate levels of voltages at first and second common nodes in response to a corresponding one of input signals from a voltage-controlled delay line. An input buffer charges the first node or discharges the second node in response to a feedback signal. An output buffer regulates a level of a voltage at an output node and outputs a frequency-multiplied clock signal and the feedback signal corresponding to the voltage level of the output node. A discharge circuit discharges the first node before a rising edge of each of the input signals from the voltage-controlled delay line is inputted. A charge circuit charges the second node before the rising edge of each of the input signals from the voltage-controlled delay line is inputted.Type: ApplicationFiled: July 27, 2005Publication date: July 30, 2009Inventors: Chul-Woo Kim, Jin-Han Kim, Seok-Ryung Yoon, Young-Ho Kwak, Seok-Soo Yoon
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Publication number: 20080049884Abstract: A linear phase detector includes an up/down pulse generator operating in response to received data signals and a recovered clock signal. The phase detector generates up and down pulses that have pulse widths proportional to the phase differences between transitions of the received data signals and edges of the recovered clock signal. By generating up and down pulses using a linear phase detector in proportion to a phase error, data signals are effectively recovered, even data signals with significant jitter.Type: ApplicationFiled: August 23, 2007Publication date: February 28, 2008Applicants: Samsung Electronics Co., Ltd., Korea University Industrial & Academic Collaboration FoundationInventors: Chul-Woo KIM, Seok-Soo YOON, Young-Ho KWAK, In-Ho LEE, Ki-Hong KIM
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Publication number: 20080048904Abstract: A thermometer code generator includes n bit storing stages that are coupled to each other, where n is an integer greater than 1, and the n bit storing stages store a thermometer code, and are adapted to increase the stored thermometer code by 1 in synchronization with a clock signal when an up signal is active, to decrease the stored thermometer code by 1 in synchronization with the clock signal when a down signal is active, and to maintain the stored thermometer code in synchronization with the clock signal when both of the up signal and the down signal are inactive.Type: ApplicationFiled: August 23, 2007Publication date: February 28, 2008Inventors: In-Ho Lee, Seok-Soo Yoon, Young-Ho Kwak, Ki-Hong Kim, Chulwoo Kim
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Patent number: 7106117Abstract: A device which may be configured to generate delayed clock signals by a specified phase difference, which may include a clock generator circuit for generating at least one clock signal, a delayed clock signal generator for delaying the at least one clock signal, a phase detect circuit for generating a selecting signal based on the amount of phase delay detected according to a half-cycle (?), and in comparison with the clock signal, a phase interpolation circuit for controlling the delay time of the delayed clock signals and interpolating the delayed clock signals, and a selecting circuit which outputs the delayed clock signal delayed by a specified phase difference.Type: GrantFiled: August 4, 2004Date of Patent: September 12, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Gun-Ok Jung, Jin-Han Kim, Sung-Bae Park, Chul-Woo Kim, Seok-Soo Yoon, Seok-Ryoung Yoon
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Publication number: 20050052211Abstract: A device which may be configured to generate delayed clock signals by a specified phase difference, which may include a clock generator circuit for generating at least one clock signal, a delayed clock signal generator for delaying the at least one clock signal, a phase detect circuit for generating a selecting signal based on the amount of phase delay detected according to a half-cycle (?), and in comparison with the clock signal, a phase interpolation circuit for controlling the delay time of the delayed clock signals and interpolating the delayed clock signals, and a selecting circuit which outputs the delayed clock signal delayed by a specified phase difference.Type: ApplicationFiled: August 4, 2004Publication date: March 10, 2005Inventors: Gun-Ok Jung, Jin-Han Kim, Sung-Bae Park, Chul-Woo Kim, Seok-Soo Yoon, Seok-Ryoung Yoon